Note: The links to the talks are available under the drop-down menu of each presentation description.
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| 11:20-11:40 |
| 11:40-12:00 |
| 12:00-12:20 |
| 12:30-13:30 |
| 13:30-15:30 |
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| 13:50-14:10 |
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8:30-9:00
Welcome and Registration
9:00-10:30
Plenary Session I: Edge AI Technology Advancements – Conference Room Attica
9:00-09:15
Advancing Edge AI Technologies and Applications.
Ovidiu Vermesan, SINTEF, Norway.
Edge AI technologies encompass a range of tools, frameworks, and hardware solutions that facilitate the deployment of AI models and algorithms on edge devices, which are often situated at the edge of a network or closer to the data source. These technologies enable real-time, local processing of data, reducing latency and enhancing privacy. As technology advances, even more sophisticated edge AI solutions are expected to emerge, further enabling real-time, on-device AI capabilities. In the next three days, these edge AI topics will be presented and explained by the experts representing the European edge AI community.
Presenter: Ovidiu Vermesan, SINTEF, Norway.
Dr Ovidiu Vermesan is Chef Scientist at SINTEF Digital, Oslo, where he is involved in applied research on future edge autonomous intelligent systems and edge AI, wireless sensing devices and networks, smart systems integration, microelectronics design of integrated systems (analogue and mixed signal), IIoT. He holds a PhD in Microelectronics and a Master of International Business (MIB). His applied research activities focus on advancing edge AI processing, embedded electronics, wireless and smart sensing technologies, and the convergence of these technologies and applying the developments to applications such as green mobility, energy, buildings, autonomous systems, electric connected, autonomous, and shared vehicles, and industrial manufacturing. He is currently the coordinator of the Edge AI Technologies for Optimised Performance Embedded Processing (EdgeAI) project.
9:15-10:00
Making Edge AI a reality.
Pierrick Autret, STMicroelectronics, France.
The emergence of Edge AI has opened new opportunities for smart devices and applications. However, the implementation of Edge AI requires low-power hardware and software platforms that can handle the processing demands of AI algorithms. In this talk STMicroelectronics will present how to address these challenges and provides solutions to make Edge AI a reality. The presentation will cover topics such as the latest developments in low-power hardware and software platforms, and how to optimize Edge AI performance while minimizing power consumption. Finally, the presentation will showcase some of the latest ST products and technologies that enable the development of Edge AI applications.
Presenter: Pierrick Autret, STMicroelectronics, France.
Pierrick Autret has been Artificial Intelligence Solutions Manager in STMicroelectronics’ microcontroller division since 2019. With a master’s degree in engineering specializing in Embedded Systems from the Ecole Polytechnique and a master’s degree in Marketing, Economics and Management from the IAE d’Aix-en-Provence, he began his career as Hardware Product Owner on the STM32 series before developing ST’s software offering.
10:30-11:00
Morning Coffee/Tea Break
11:00-17:00
Parallel Sessions
11:00-12:30
Session A01: Edge AI Tools and Methods.
Session Co-chairs:
Fabian Chersi, CEA-List, France, Frédéric Pétrot, Univ. Grenoble Alpes, France
This session is dedicated to the presentation of tools and methods aimed at simplifying and accelerating the design flow, from application development to deployment, from neural network exploration, learning, quantizing, testing, to the generation of optimized hardware-aware code and deployment on edge devices constrained by power consumption or dissipation, latency, form factor and/or cost criteria.
Keywords: edge devices, quantization, pruning, NN optimization, NN deployment, tools for edge devices.
Session B01: Edge AI Machine Vision.
Session Co-chairs:
Alain Pagani, DFKI, Germany, Sadique Sheik, SynSense AI, Switzerland
The session covers presentation addressing edge AI machine vision technology and applications developments based on different algorithms and techniques. The presenters focus on the optimisation techniques and AI accelerators capable of processing inference at minimal power consumption. The implementations include ML algorithms and neural networks used in machine vision tasks optimises for edge devices with constrained resources.
Keywords: edge AI, machine vision, machine learning, deep learning, image signal processors, convolutional neural networks.
11:00-11:20
Presentation: A01_1: Optimization and Compression of Computer Vision and Generative AI Models for Neuromorphic Accelerators.
Tim Llewellynn, Bonseyes Community Association, Switzerland.
In many AI applications, models typically demand extensive training datasets and benchmark data for robust performance. However, gathering such vast and diverse datasets can be especially challenging in edge computing environments. This presentation addresses this critical challenge by showcasing how Generative AI and Computer Vision foundational models can help mitigate the burden by generating synthetic data and benchmarks that closely resemble real-world scenarios. Applicability to Neuromorphic model development will be discussed and AI development in edge computing, where data scarcity is a common constraint.
Speaker: Tim Llewellynn, Bonseyes Community Association, Switzerland.
Tim Llewellynn is President of the Bonseyes Community Association and has 20 years in high-tech startups and corporate R&D in data-driven software development for cloud, mobile and edge computing applications. At Bonseyes Community Association (BCA), is a non-profit AI-focused association, he drives the democratization of artificial intelligence for the benefit of all society, ensuring that AI, from narrow to general, creates highly autonomous systems that benefit everyone, not just a select few. Tim received his B.E. and M.E. (Hons) degrees in Electrical Engineering from the University of Canterbury, New Zealand in 1999, and 2001.
Presentation: B01_1: Image Signal Processor (ISP)
Tunning Machine Learning (ML) methods.
Sepehr Bijani, NXP Semiconductors, Munich, Germany
Image Signal Processor (ISP) is responsible for improving camera signal quality and producing a high-quality image. ISP has a vast number of parameters which should be tunned based on both camera sensor and the environment which camera is operating. Sensor related ISP parameters should be tunned offline for each camera sensor. Parameters related to environment such as white balancing gains should be fine-tuned in the field during the runtime. The offline phase is cumbersome and costly. At the same time, the runtime for fine-tuning should be fast and accurate. Therefore, the Tuner needs to achieve two goals: a) tune the sensor related parameters automatically in lab and b) create a data set for different scenario in lab and train a Machine Learning (ML) runtime for fine-tunning ISP in the field. We first create a solver for finding static camera related parameters. Then, we create the dataset of camera scenes and optimal ISP parameters found by the same solver for each scene for training runtime ML model. The trained ML model will inference optimal ISP parameters for the scene in the field.
Speaker: Sepehr Bijani, NXP Semiconductors, Munich, Germany.
Sepehr is SW engineer working for NXP Germany. His main research topic is AI/ML in image processing applications. His professional carrier focuses on embedded SW engineering.
11:20-11:40
Presentation: A01_2: Shrinking Embedded Machine Learning Applications: FMCW Radar Gesture Sensing on Cortex-M0+ under 10KB and 10mW.
Jonas Daugalas, Infineon Technologies AG, Germany
AI-enabled millimeter-wave radar sensors are becoming increasingly popular solutions for human-machine interaction tasks. However, due to compute and memory requirements, signal processing and machine learning approaches pose challenges for deploying such solutions to low-cost and low-power edge devices. In this work we demonstrate signal processing optimization techniques and neural network inference engine trade-offs that allow us to deploy a 60GHz FMCW radar-based gesture recognition solution on an Infineon PSoC™ 4 microcontroller equipped with an Arm® Cortex-M0+ processor. Our proposed system robustly recognizes five distinct hand gestures, requires less than 10 milliwatts of power, 9.7KB of RAM, 107KB of EPROM, 73% of processor time, and with microTVM, among other three evaluated inference engines, achieves the best trade-off between manual effort and in-field performance.
Speaker: Jonas Daugalas, Infineon Technologies AG, Germany.
Jonas Daugalas has a background in Computer Science, bachelor’s degree in CS from Vilnius University and master’s degree in CS from Technical University of Munich. Software engineering experience in the fields of particle physics, computer-aided design, physical simulation, machine learning and digital signal processing.
Jianyu Zhao has background in Electrical and Information Engineering: received a B. Eng. from Tianjin University in 2015 and a M. Sc. from Technical University of Munich in 2018. Work experience on algorithm design and deployment for smart sensing technologies at Infineon Technologies AG since 2018. Current research interest: neural network embedding on edge devices. Presentation Link
Presentation: B01_2: Ultra-low Power Car Plate Recognition at the Edge.
Dávid Isztl, Institute of Embedded Systems (InES), ZHAW School of Engineering, Switzerland.
So far, only a few edge devices include AI accelerators that are capable of processing inference at minimal power consumption. As an example, the MAX78002 provides a 2Mbytes CNN engine and an Arm Cortex-M4 with 384KB of SRAM. On one hand, the device can work battery-powered for up to 3 years. On the other hand, severe compromises and complex procedures are necessary to adapt AI networks for specific applications. Using license plate recognition as an example, the talk will show how the shortcomings of the small memory footprint and low image resolution offered by the AI accelerator can be overcome.
Speaker: Dávid Isztl, Institute of Embedded Systems (InES), ZHAW School of Engineering, Switzerland.
Dávid Isztl is a research assistant at the Institute of Embedded Systems at ZHAW. Currently, his research is focused on high-performance embedded platforms, including AI accelerators and Nvidia NX/AGX platforms. Currently, he is focusing on low-power AI processing on the edge.
11:40-12:00
Presentation: A01_3: Aidge: A New Framework for Deep Neural Network development, Training, and Deployment on the Edge.
Fabian Chersi. CEA-List, FRANCE
Aidge is a comprehensive framework for fast and accurate Deep Neural Network (DNN) building, training, testing and deployment. The platform integrates tools for database construction, data pre-processing, network building, benchmarking, and hardware export to various targets. It is particularly useful for DNN design and exploration, allowing simple and fast prototyping of DNN with different topologies. Export hardware targets include CPU, DSP, and GPU as well as custom hardware code generation with High-Level Synthesis for FPGA and dedicated configurable DNN accelerator IP.
Speaker:Fabian Chersi. CEA-List, FRANCE.
Dr. Fabian Chersi has a BSC and a Master in Electronic Physics, and a PhD in Computational Neuroscience and Robotics. After his studies, he initially did a postdoc at the Institute for Neuroinformatics in Zurich and at UCL in London, then he moved to Paris where he worked in private companies on the development of neuromorphic algorithms and ASICs for deep neural networks. He currently works at the Alternative Energies Commission (CEA) in Paris as a senior AI architect on low power AI chips for the edge.
Presentation: B01_3: Designing Lightweight CNN for Images: Architectural Components and Techniques.
Lilian Hollard, Université de Reims Champagne-Ardenne, France
While neural networks have brought about impressive advancements in computer vision tasks, these achievements heavily depend on computationally demanding resources, restricting their deployment. The presentation unveils the landscape of deep learning architecture optimization tailored for mobile and Edge devices.
Speaker: Lilian Hollard, Université de Reims Champagne-Ardenne, France.
First year Ph.D. student at LICIIS from the University of Reims Champagne Ardenne, development of Artificial Intelligence models for viticulture: Disease identification and yield estimation. Adaptation and optimization of Deep Learning models for Edge and mobile devices.
12:00-12:20
Presentation: A01_4: A Low Power And High-Performance Software Approach to Artificial Intelligence On-Board.
Pablo Ghiglino, Klepsydra Technologies, Switzerland.
Future spacecraft require increased autonomy, more sensors, and better processing power for space exploration, Earth Observation, and robotics. These advancements bring challenges like low determinism, high power consumption, data losses, and response delays. This article presents a novel approach to on-board artificial intelligence (AI) using data pipeline and parallelization techniques to enhance deep neural networks (DNN) in space applications. The results show significantly improved data processing speed and power efficiency, enabling practical AI in space.
Speaker:Pablo Ghiglino, Klepsydra Technologies, Switzerland.
Dr Pablo Ghiglino, Klepsydra founder and CEO. Over 10 years of experience in the finance industry, regarded as a highly skilled software developer. Parallel to his work in finance, Pablo successfully studied for a PhD at the Surrey Space Center in Aerospace Engineering in the field of “High Precision Planetary Landing”. After his studies, he got involved in several aerospace projects, where he seized the opportunity and created Klepsydra to respond to the needs for cutting edge computing by implementing successful software techniques from the highly competitive financial sector in embedded software frameworks for its use in other industries.
Presentation: B01_4: Upstream Mask Tuning of the Plain Vision Transformer for Domain Generalization on Downstream Segmentation Tasks.
Tommie Kerssies, Eindhoven Technical Univerity, the Netherlands.
Deploying perception models on edge devices requires robustness to real-world distribution shifts. We reveal that a fine-tuned plain vision transformer excels in out-of-distribution generalization but is hindered by single-scale features and image-level, as opposed to pixel-level, pretraining. To mitigate this, we employ a mask-tuning step on a large, high-resolution dataset consisting solely of masks, guided by a frozen teacher for semantic context. Our work aims to redirect the domain generalization field towards optimizing pretraining rather than complicating fine-tuning.
Speaker: Tommie Kerssies, Eindhoven Technical Univerity, the Netherlands.
Tommie Kerssies is a PhD candidate in the Mobile Perception Systems Lab at Eindhoven University of Technology, under the guidance of Gijs Dubbelman. Specializing in the generalization capabilities of foundation models, Tommie brings a strong academic background with a master’s in data science and a bachelor’s in computer science.
12:30-13:30
Networking Lunch
13:30-15:30
Session C01: RISC-V-based Edge AI Hardware Acceleration.
Session Co-chairs:
Konstantinos Georgopoulos, Iakovos Mavroidis, Technical University of Crete, Greece
RISC-V-based edge devices are rapidly expanding their scope and application range. They are efficient in executing a variety of AI algorithms close to the application environment, ensuring energy efficiency while maintaining high performance. Furthermore, the open-source architecture of RISC-V enables researchers to customize and enhance it, incorporating low-power AI and security accelerators tailored to the specific needs of edge applications. This session will focus on RISC-V-based edge architectures and their diverse applications.”
Keywords: RISC-V, hardware accelerator, reconfigurable hardware, AI accelerator, HW/SW co-design, energy consumption, HW-based security, ΙοΤ.
Session D01: Edge AI Accelerators Architectures.
Session Co-chairs:
Mario Diaz Nava, STMicroelectronics, France, María Loreto Mateu Sáez, Fraunhofer/IIS, Germany.
Efficient Edge AI system solutions (with highly energy efficient, low latency and high integration) require new HW Processors that support AI advanced features based on neuromorphic architectures implemented in different embedded non-volatile memory and SRAM technologies. This session presents a selection of different AI accelerators capable of addressing different areas of Edge applications. These hardware processors are essential for optimal Edge solutions, but a trade-off between cost and technological features is necessary.
Keywords: HW accelerators, eNVM, FPGA, architecture, neural networks, edge IoT devices, framework, toolchain, dataflow, flexibility, scalability.
13:30-13:50
Presentation: C01_1: How to Accelerate Your Application on RISC-V Using a Coprocessor Interface.
Dr. Christian Herber, NXP, Germany.
RISC-V is becoming the most popular ISA for advanced applications like AI due to its modularity and customizability. However, customization comes with several downsides, like ecosystem fragmentation and design complexity. A clearly defined coprocessor interface can reduce design efforts and improve interoperability. This presentation outlines the use-cases and challenges in a coprocessor interface based on concrete interface definitions.
Speaker: Dr. Christian Herber, NXP, Germany.
Christian Herber the European Principal RISC-V Architect at NXP. Based in Hamburg, his work focuses on innovation management and advanced IP for RISC-V processors in Europe. He has a background in automotive processing, networking, and software. He holds a PhD in Electrical Engineering and an M.Sc. in Electrical Engineering and Information Technology, all from Technical University of Munich, Germany.
Presentation Link
Presentation: D01_1: Efficient Mapping of Neural Networks on FPGA With Generated VHDL code.
Thierry Delafontaine, Institute of Embedded Systems (InES), ZHAW School of Engineering, Switzerland.
FPGAs are an ideal platform to accelerate AI processing at the edge. However, straightforward toolchains to deploy AI accelerators without in-depth knowledge of FPGA programming are lacking. We present a framework that allows the design of custom AI accelerators for FPGAs by generating application specific VHDL code. The framework proposes a dataflow-style hardware mapping that is specific to the NN and optimally uses the available resources. We focused on providing an easy-to-use interface for users and an expandable core that allows developers to add custom operators, optimizers, objectives, metrics, and callbacks.
Speaker: Thierry Delafontaine, Institute of Embedded Systems (InES), ZHAW School of Engineering, Switzerland.
Thierry Delafontaine is a researcher at the Institute of Embedded Systems at the University of Applied Sciences in Zürich. His research topics include embedded AI and accelerating Neural Networks on embedded devices. Currently, he is building the iAIa framework, that he presents at the EEAI conference.
13:50-14:10
Presentation: C01_2: The Beauty of RISC-V Customization for Edge AI HW Acceleration.
Arturo Prieto, Lund University, Sweden.
Edge AI is becoming an increasingly popular topic due to the continuous development of AI applications avoiding the dependencies on-the-cloud. The use of sensitive data or latency constraints push for processing on edge devices. Battery-limited and area-constrained devices offer the opportunity for hardware designers to find efficient architecture solutions. In this presentation, a RISC-V platform is presented as the conductor for the customized integration of hardware accelerators.
Speaker: Arturo Prieto, Lund University, Sweden.
Arturo Prieto received his B. Sc. degree in Electronics Engineering in 2017 from the Polytechnic University of Valencia, Spain, and the M. Sc. degree in Electronic Design in 2019 from Lund University, Sweden. He is currently a PhD student in the Digital ASIC group at the department of Electrical and Information Technology (EIT), Lund University. His doctoral studies focus on beyond-von Neumann architectures for edge computing.
Presentation: D01_2: A Scalable and Flexible Interconnect-based Dataflow Architecture for Edge AI Inference.
Hana KRICHENE. CEA-List, France.
The scalable approach of edge AI inference has increased its computational complexity due to the involvement of multiple properties. This work proposes an interconnect-based dataflow architecture based on many Processing Elements to overcome such problems. The proposed architecture can efficiently handle different convolutions featuring different shapes of input image/feature maps and filters, with data reuse and communication-computation overlap. It is scalable and configurable to adapt to different CNN layers.
Speaker: Hana KRICHENE. CEA-List, France.
Dr. Hana Krichene obtained her Ph.D. Degree in Computer Science in 2015 from the University of Lille. She joined CEA LIST (Saclay, France) in 2017 to participate in the development of the Future E/E Architecture for Automotive Computing Environment. Since 2020, she conducts study research on NoC optimized for AI hardware accelerators of future systems used by the industrial partners of the project. Her current research focuses on developing an advanced dataflow architecture and an environment for mapping and estimating the cost of running a DNN application on a given dataflow architecture.
14:10-14:30
Presentation: C01_3: Heterogeneous SoA Processing on the Edge.
Yannis Papaefstathiou, Exascale Performance Systems – EXAPSYS, Greece.
The REBECCA project is developing efficient edge-AI systems that can overcome physical limitations of edge devices and meet regulations and constraints in numerous distinct application domains. This involves designing and developing hardware, software, and middleware that can accelerate computation-intensive parts of both AI and conventional applications, ensure deterministic response times, and satisfy safety constraints. The project is working towards enhancing European strategic autonomy and sovereignty by using an open, royalty-free CPU architecture (i.e., RISC-V), and address performance safety and security concerns associated with IoT and edge devices.
Speaker: Yannis Papaefstathiou, Aristotle University of Thessaloniki, Greece.
Yannis Papaefstathiou is a Professor at ECE School and Aristotle University of Thessaloniki and a co-founder and CEO of Exascale Performance Systems (EXAPSYS). His main research interests are in the design and implementation methodologies for CPS with tightly coupled design parameters and highly constrained resources as well as in heterogeneous High-Performance Computing (HPC) systems and the associated programming/development tools. He was granted a PhD in computer science at the University of Cambridge in 2001, an M.Sc. from Harvard University in 1997 and a B.Sc. from the University of Crete in 1996. He has published more than 100 papers in IEEE and ACM-sponsored journals and conferences. He has participated in more than 15 competitively funded research projects in Europe with a cumulative budget share of more than €9 million.
Presentation: D01_3: DeepEdgeSoC: End-to-end Deep Learning Framework for Edge IoT Devices.
Mhd Rashed Al Koutayni, DFKI Kaiserslautern, Germany.
In the IoT domain, FPGAs are considered a powerful alternative to general purpose graphics processing units (GPGPUs) since their flexible architecture can run the DNNs with much less energy. The enormous amount of effort and time required for the entire end-to-end edge-aware deployment urged us to develop DeepEdgeSoc, an integrated framework for DL design and acceleration. DeepEdgeSoc is an overarching framework under which DNNs can be built. DeepGUI, a visual drag-and-drop DNN design environment, plays an important role in accelerating the network design phase. In DeepEdgeSoc, the networks can be quantized and compressed to suite the underlying edge devices in terms of size and energy.
Speaker: Mhd Rashed Al Koutayni, DFKI Kaiserslautern, Germany.
After receiving his master degree in Embedded Computing Systems at the Technical University of Kaiserlslautern-Landau (RPTU), Mr. Mhd Rashed Al Koutayni joined the Augmented Vision department of the German Research Center for Artificial Intelligence (DFKI) in Kaiserslautern (Germany) as a scientific researcher while pursuing at the RPTU university as a PhD student. His main research focus is FPGA-Based Hardware Acceleration of Deep Neural Networks for Computer Vision.
14:30-14:50
Presentation: C01_4: Why Running Kubernetes on RISC-V is Important for AI Applications.
Antony Chazapis, Christos Kozanitis, FORTH, Greece.
Kubernetes is the leading open-source container orchestration platform, widely adopted for easily developing and running scalable applications from the Cloud to the Edge. And now, through K3s (a CNCF-certified distribution), one can also run Kubernetes on devices with processors that use the open RISC-V instruction set. In this talk we will present the process of supporting the new architecture and discuss the prospects this brings for AI applications in future Edge platforms.
Speaker: Antony Chazapis, FORTH, Greece.
Antony Chazapis is a postdoctoral researcher at the CARV Lab of FORTH-ICS. He works on distributed, large-scale platforms for both compute and storage that span the whole computing continuum, from the Cloud to the Edge. His experience and interests include acceleration technologies for Machine Learning/AI in both HPC and the Cloud, Cloud-native software architectures, bridging Cloud with HPC, as well as DevOps and MLOps practices.
Presentation Link
Presentation: D01_4: A FeFET-based Non-Volatile Memory and AI Accelerator Macro.
Marko Noack, Ferroelectric Memory GmbH, Germany.
The presentation focuses on the design of a highly configurable AI accelerator macro for convolutional neural networks using ferroelectric NVM as weight storage and which serves as a building block for edge AI systems. We furthermore present a test setup in which the digital part of the circuit was implemented on an FPGA using weights stored on a separate FeFET NVM chip to demonstrate image processing tasks.
Speaker: Marko Noack, Ferroelectric Memory GmbH, Germany.
Marko Noack received the M.Sc. degree in electrical engineering from Technische Universität Dresden, Germany in 2011. He was working on VLSI implementations of neuromorphic circuits before he co-founded the Ferroelectric Memory GmbH (FMC) in 2016, where he is currently Member of Technical Staff and project leader. He works on non-volatile memory circuit designs based on ferroelectrics.
15:00-15:30
Afternoon Coffee/Tea Break
15:30-17:00
Session E01: Trustworthy Edge AI.
Session Co-chairs:
Kay Bierzynski, Infineon Technologies AG, Germany, Olaf Peters, Technolution, the Netherlands.
Trustworthy edge AI addresses the development and deployment of AI systems at the edge of a network with a focus on ensuring system dependability e.g., reliability, security, privacy, and ethical behaviour among other properties. Ensuring trustworthiness in edge AI-based systems requires a multidisciplinary approach that combines expertise in electronics, sensing, IoT, AI, cybersecurity, privacy, ethics, and regulatory compliance. The session addresses the concepts for edge AI trustworthiness and the challenges for developing and deploying edge AI trustworthy systems.
Keywords: explainable edge AI, interpretable edge AI, transparency, edge AI bias mitigation, consent mechanisms, anonymisation, adverbial defence, accountability, verification, validation and testing.
Session F01: Optimisation Methods and Techniques for Neural Networks.
Session Co-chairs:
Gerardo Daalderop, NXP Semiconductors, the Netherlands, Alberto Faro, DEEPSENSING SRL, Italy.
Optimisation methods and techniques for neural networks depend on the specific problem, architecture, and available AI-based HW resources. Experimentation and tuning are required to find the optimal combination for a given neural network task. The session covers various optimisation methods and techniques used in training neural networks to find the set of model parameters that minimise a predefined loss functions.
Keywords: Bayesian neural networks, pruning techniques, energy, size, accuracy, hierarchical-controlling system, neural network processing.
15:30-15:50
Presentation: E01_1: Efficient AI-based Attack Detection Methods for Sensitive Edge Devices and Systems.
Celine Thermann, University of Lübeck, Germany.
Sensitive data is stored on an increasingly large number of edge devices, representing a lucrative target for attackers. Hardware and performance overhead, as well as environmental stresses, play a crucial role in the selection of appropriate solutions. In this research contribution, we are examining the requirements for Artificial intelligence (AI)-based mechanisms and the sensing capabilities of state-of-the-art secure devices.
Speaker: Celine Thermann, University of Lübeck, Germany.
Celine Thermann is a research assistant at the Institute of Computer Engineering at the University of Lübeck, Germany. She received both a Bachelor and Master degree in 2020 and 2022 in IT-Security from the University of Lübeck, respectively. Her main research interest is deep learning and embedded system security, and she focuses on the trustworthiness of AI accelerators.
Presentation: F01_1: Memristor Based Bayesian IMC.
Tifenn HIRTZLIN, CEA-LETI, France.
This presentation examines three methods employing resistive memory’s natural randomness for Bayesian near-memory and in-memory computing. The approaches encompass Bayesian machines optimized for near-memory computing, Bayesian neural networks that capitalize on synaptic randomness, and Bayesian learning using the Metropolis-Hastings Markov Chain Monte Carlo technique. These techniques yield competitive accuracy compared to traditional software methods while enabling decision uncertainty assessment.
Speaker: Tifenn HIRTZLIN, CEA-LETI, France.
Tifenn HIRTZLIN earned a Ph.D. in Nanosciences and Electrical Engineering from the University of Paris-Saclay, France, in 2020, and is currently a Research Engineer at CEA Leti. He is at the forefront of designing intelligent memories for the Internet of Things (IoT), drawing inspiration from bio-inspired concepts such as the Bayesian approach to brain function. Tifenn’s primary responsibility involves designing electrical circuits for application-specific integrated circuits (ASICs) that exploit non-volatile memory devices, and evaluating their performance, contributing significantly to the advancement of IoT technology.
15:50-16:10
Presentation: E01_2: Explainability and Interpretability Concepts for Edge AI Systems.
Angelo Genovese, Università degli Studi di Milano, Italy.
The presentation gives an overview of the recent techniques for AI explainability and interpretability, with a specific focus on Edge computing. The presentation will discuss the motivations for explainability and interpretability, a taxonomy of the latest methodologies, the most common benchmarking approaches, as well as challenges, open issues, and research trends.
Speaker: Angelo Genovese, Università degli Studi di Milano, Italy.
Angelo Genovese received the Ph.D. degree in computer Science from the Università degli Studi di Milano, Italy, in 2014. He has been an Associate Professor in Computer Science with the Università degli Studi di Milano since 2022. He has been a Visiting Researcher with the University of Toronto, Toronto, ON, Canada. Original results have been published in over 60 papers in international journals, proceedings of international conferences, books, and book chapters. His current research interests include signal and image processing, artificial intelligence, industrial and environmental monitoring systems.
Presentation: F01_2: Trade-Off Analysis of Pruning Methods for Compact Neural Networks on Embedded Devices.
Duc V Le, University of Twente, The Netherlands.
Pruning of neural networks is a technique often used to reduce the size of a machine learning model, as well as to reduce the computation cost for model inference. This study analyses four pruning techniques for efficient reduction of machine learning model size, based on compression-accuracy balance. Evaluation includes impact on energy use during inference on a Raspberry Pi 4B using MobileNetV2. We examine trade-offs among energy, size, and accuracy, aiding engineers in selecting optimal pruning for embedded ML models. The research is expected to provide engineers with a reference providing guidance upon deciding what pruning technique to use for a machine learning model to be deployed on an embedded device.
Speaker: Duc V Le, University of Twente, The Netherlands.
Dr. Le Viet Duc is Assistant Professor at the Department of Computer Science at the University of Twente. Inspired by the way the human brain learns the world, he is eager to develop sustainable AI models for that is robust to change in data distribution caused by new environments, bridging the gap between lab and word. His focus is on finding efficient methods to learn, transfer and distil knowledge hidden in different datasets, especially unlabelled ones. As he has 10 years R&D experience in developing smart and wearable and industrial devices, he is also interested in applying his research to industrial products for a sustainable world.
16:10-16:30
Presentation: E01_3: Approximate Computing in a Federated Learning Context: Gains Beyond Energy.
Ihsen Alouani, Université Polytechnique Hauts-De-France, France.
In energy-constrained systems at the edge, the adoption of federated learning has garnered significant attention due to its dual capacity to address privacy concerns while achieving accurate model training without resource-intensive methodologies. The Approximate Computing paradigm, characterized by leveraging controlled imprecision to achieve computational efficiency, has emerged as one of the solutions towards a trade-off between performance and energy consumption in fault-tolerant applications. Expanding on these foundational concepts, the presentation proposes an innovative approach, i.e., “Approximate Federated Learning.” Within this framework, nodes collaboratively undertake training and inference procedures utilizing approximate computing techniques, thereby accentuating energy efficiency gains. The study extends the benefits beyond energy conservation, highlighting substantial security enhancements achievable within this amalgamation. This holistic framework advances energy optimization in edge scenarios and bolsters the overall security and trustworthiness of edge AI systems.
Speaker: Ihsen Alouani, Université Polytechnique Hauts-De-France, France.
Ihsen Alouani received his master’s degree from the National Engineering School of Sousse, Tunisia, and his Ph.D. in 2016 from the Université Polytechnique Hauts-de-France. After his PhD, he was a Postdoc at Technical University of Munich, Germany followed by an Associate Professor at IEMN Laboratory (CNRS-8520), Université Polytechnique Hauts-de-France in 2018. He served as Guest Editor for several journals including Microprocessors & Microsystems and is a member of the Program Committee of several international conferences including Design Automation Conference (DAC) as well as Asia and South Pacific Design Automation Conference (ASP-DAC). His research interest includes machine learning security and privacy, Approximate Computing, and Embedded Systems reliability and security.
Presentation: F01_3: SENECA: Flexible and Scalable Neuromorphic Processor for Efficient Event-driven Neural Processing.
Guangzhi Tang, imec, the Netherlands.
The lack of flexibility in most neuromorphic architecture designs results in significant performance loss and inefficient memory usage when mapping various neural network algorithms. We present SENECA, a digital neuromorphic architecture that balances the trade-offs between flexibility and efficiency using a hierarchical-controlling system. A SENECA core contains two controllers, a flexible RISC-V-based controller, and an optimized controller (Loop Buffer). This flexible computational pipeline allows for deploying efficient mapping for various neural networks, on-device learning, and pre-post processing algorithms. The hierarchical-controlling system introduced in SENECA makes it one of the most efficient neuromorphic processors for event-driven neural network processing.
Speaker: Guangzhi Tang, imec, the Netherlands.
Guangzhi Tang is a researcher at imec based in Eindhoven, the Netherlands. His research focuses on neuromorphic computing, hardware-aware neural networks, and robotics. He has extensive experience working in the field of neuromorphic computing to explore the real-world advantages of digital neuromorphic architectures. He received his Ph.D. and M.Sc. degrees in Computer Science from Rutgers, the State University of New Jersey in the United States, and his B.Sc. degree in Computer Science from Nanjing University in China.
16:30-16:50
Presentation: E01_4: Shaping Edge AI That Flows With Humans: Designing Trustworthy and Useful AI Applications.
Peter Moertl, Virtual Vehicle Research GmbH, Austria.
The introduction of artificial intelligence solutions in industrial work processes leads in most cases to changes in human tasks and responsibilities rather than complete autonomous operations. However, technology-centered AI introductions that are currently still common, frequently overlook the role of the human operator and the involved organizations, resulting in significant AI effectiveness reductions and even social backlashes, slowing down progress, AI uptake, and real benefit-accrual. In the InSecTT project we have investigated various use cases for AI applications in different domains including medical, transportation, IT, and manufacturing and have formulated a framework for successful AI introductions that centers around human oversight. In this presentation we will present this framework and give examples for its application in multiple domains.
Speaker: Peter Moertl, Virtual Vehicle Research GmbH, Austria.
Dr Peter Mörtl is the manager of the human the factors teams at Virtual Vehicle Research center in Graz, Austria. His focus is on preparing and facilitating human and system integration for technological developments in automotive and AI applications, specifically focusing trust, user modeling, and user acceptance by applying human factors and systems engineering. Previously he has worked as systems engineer and human factors researcher in aviation projects in the United States to develop flight-deck and air traffic control applications. He is also Lector for Human-Systems Integration at the University of Graz, Austria.
Presentation: F01_4: Energy Efficient Deep-Edge Computing through Hardware Machine Learning.
Marcello Coppola, ST Microelectronics, France.
It is currently challenging to accomplish high data processing with low latency, because large-scale, persistent, high-bandwidth connection is often required to gather huge volumes of data from platforms and sensors operating at the edge to allow processing in the cloud. Internet-of-Things (IoT) devices deployment in remote locations for environmental monitoring with machine learning (ML) techniques, Internet-of-Medical Things, IoT-based precision agriculture, all can operate with limited battery, while robustness and reliability is required.
Speaker: Marcello Coppola, ST Microelectronics, France.
Marcello Coppola is a Technical Director at STMicroelectronics, in charge of the implementation of several research projects, including overseeing day-to-day field-based activities related to System-On-Chip Consumer Space, Automotive, IoT, Healthcare, with particular emphasis on Network-on-Chip, heterogenous multi-core hardware and software architectures which include CPU, GPU and accelerators.
17:00
End
20:00
Dinner
Note: The links to the talks are available under the drop-down menu of each presentation description.
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8:30-9:00
Welcome and Registration
9:00-10:30
Plenary Session II: European Edge AI Ecosystem – Conference Room Attica
9:00-09:30
Chips for Europe Initiative.
Marco Ceccarelli, European Commission, Belgium.
The Chips Act allocates over 11 billion EUR of public support for the “Chips for Europe” Initiative. This initiative is structured around five primary lines of action: 1) a cloud-based virtual design platform, 2) pilot lines dedicated to prototyping and validation, 3) tools and infrastructure for quantum chips, 4) skills development and competence centres, 5) the Chips Fund, providing loans and equity investments. The envisaged virtual design platform will offer streamlined cloud access to tools, libraries, and services, targeting faster development and shorter time-to-market. Drawing from EUROPRACTICE’s success, the platform will provide EDA & IP, training, IC services, and prototyping for European enterprises. It aims to reduce barriers for SMEs, stimulate IP generation and sharing, and boost innovation. Users will get access to novel pilot lines, complete with PDKs, allowing them to develop prototypes using cutting-edge technologies and advanced packaging. The pilot lines are rooted in the testing and experimentation platform for Edge AI. This multi-hub project commenced at the end of 2022 and will offer prototype chip fabrication capability in advanced technologies for edge AI. The design platform will feature collaborative spaces to foster enhanced stakeholder cooperation in developing European technology, IP, and tools. Emphasis will be placed on the development of open-source hardware and tools. Edge AI is anticipated as a central theme for projects supported by the platform. The aim is to harness EU synergies in this arena, as edge AI can enable advancements in semiconductor technology nodes, design approaches, and architectural innovations.
Speaker: Marco Ceccarelli, European Commission, Belgium.
Marco Ceccarelli is Programme Officer at the European Commission in Brussels (B) where he contributes to the definition of EU policies for the electronics industry. He is one of the main authors of the European “Chips Act” package and plays a key role in its implementation. Before joining the Commission in 2017, he held several managerial roles at Philips (NL), where he focused on innovation for electronic systems, as well as several executive positions in high-tech SMEs. He began his career as research scientist in Italy and the Netherlands. Marco holds a Laurea degree in Electronic Engineering from the University of Florence (I) and an Executive MBA from the ESSEC business school in Paris (F).
9:30-10:00
The Landscape of Edge AI technology developments in Europe and the synergies with the Chips for Europe Initiative.
Huascar Espinoza, Chips JU, Belgium.
The long-term strategy of Chips JU is to tackle edge AI research and innovation by a series of open calls. While many ECSEL projects have been already contributing to the areas of edge computing, AI, IoT and connectivity, Chips JU has recently open edge AI-related Focus Topic calls oriented to push the technological boundaries in terms of processing solutions for AI at the edge addressing the design stack and middleware (Call 2021) and integration of trustworthy edge AI technologies in complex heterogeneous components and systems (Call 2023). Most recently a focus topic on AI-base methods and tools for engineering efficiency has started to be prepared with a primary scope on Edge AI. This talk provides a landscape of the Edge AI technology developments, the expected contributions to co-create a strong European edge AI ecosystem, and the synergies with the upcoming Chips for Europe Initiative particularly in liaison with the Chips Design Platform.
Speaker: Huascar Espinoza, Chips JU, Belgium.
Huascar Espinoza is a Programme Officer at Chips JU. He has a PhD in Computer Science, and his main background is on design of AI-based safety-critical systems. Prior to Chips JU, he acted as coordinator of various EU projects in the areas of safety assurance, certification, and robotics technologies.
10:00-10:30
Projects Pitch Presentations
AIMS5.0 – NEUROKIT2E – REBECCA – CLEVER
10:30-11:00
Morning Coffee/Tea Break
11:00-17:00
Parallel Sessions
11:00-12:30
Session A02: Second European Workshop on the Future of Edge AI. Room Abbey
Session Co-chairs:
Inessa Seifert, EPoSS, Germany, Paolo Azzoni, Inside Industry Association, the Netherlands
The goal of the session is to identify a potential roadmap for the European research and innovation in the domain of edge AI. The roadmap will coin future focus topics of the Chips Joint Undertaking and inspire other European programmes. We strive for an open ecosystem that fosters a fast adoption of research and innovation results in the European and global markets. We aim at strengthening the role of European chip vendors and system integrators in the emerging Digital Continuum and ensure high value proposition of key applications based on edge AI.
Keywords: edge AI ecosystem, European Chips Act, digital continuum, research and innovation.
Session B02: Smart Connectivity at the Edge.
Session Co-chairs:
Luca, Scuola Superiore Sant’Anna, Italy, Marcello Coppola, STMicroelectronics, France.
Edge systems will increasingly leverage collaboration to reach computational effectiveness while reducing hardware computational requirements (e.g., swarm learning). In addition, in network computation is emerging to reduce capacity requirements and closed-loop control execution time. This scenario demands for smart connectivity, both wired and wireless, at the edge where resources are allocated for data and control communications preserving energy, capacity, security and confidentiality. This session will focus on tools and techniques for providing the requested connectivity to the edge devices while guaranteeing the KPIs.
Keywords: wireless, wired, connectivity, collaborative computing, energy, capacity, security, confidentiality.
11:00-11:20
A02_1: Create European Ecosystem and Enforce Synergies Between Existing Ecosystems for Fast Adoption of Edge AI Solutions.
Presentation and discussion on the edge AI value chain that encompasses various stakeholders who contribute to the development, deployment, and utilization of edge AI technologies. Alignment among these stakeholders is important to realizing the full potential of edge AI while addressing challenges related to security, privacy, interoperability, and ethical considerations.
Presentation: B02_1: Edge AI LoRa Mesh Technologies.
Janis Judvaitis, Institute of Electronics and Computer Science, Latvia.
Intelligent connectivity at the edge combines wireless communication, edge artificial intelligence (AI), edge computing and Internet of Things (IoT) technologies to perform machine learning (ML) and deep learning (DL) tasks on connected edge devices. Low latency, ultra-low energy intelligent IoT devices with on-board computing, distributed architecture and analytics are essential as intelligent connectivity advances.
Speaker: Janis Judvaitis, Institute of Electronics and Computer Science, Latvia.
Janis Judvaitis is a researcher in Institute of Electronics and Computer Science (EDI) as well as a Ph.D student in Computer Science at University of Latvia. Works in EDI from 2013. He is involved in various international projects related to Wireless Sensor Networks, embedded systems, and Internet of Things. Expertise in ICT system design, development, implementation, and testing.
11:20-11:40
A02_2: Foster Collaboration Along the AI Value Chain from Chip Vendors to System Integrators in Europe.
Presentation and discussion on the fast adoption of edge AI solutions, the development of a robust ecosystem and the creation of synergies among various stakeholders. Focus on the key elements and strategies for fostering this ecosystem and accelerating the adoption of edge AI.
Presentation: B02_2: Cascaded Look Up Table Distillation of P4 Deep Neural Network Switches.
Luca Valcarenghi, Scuola Superiore Sant’Anna, Pisa, Italy.
In-network function offloading represents a key enabler of the SDN-based data plane programmability to enhance network operation and awareness while speeding up applications and reducing the energy footprint. This paper proposes an innovative knowledge distillation technique that maps a DNN into a cascade of lookup tables (i.e., flow tables) with limited entry size. The proposed mapping avoids stateful elements and maths operators, whose requirement prevented the deployment of DNNs within hardware switches up to now. The evaluation considers a cyber security use case targeting a DDoS mitigator network function, showing negligible impact due to the lossless mapping reduction and feature quantization.
Speaker: Luca Valcarenghi, Scuola Superiore Sant’Anna, Pisa, Italy.
Luca Valcarenghi is an Associate Professor at the Scuola Superiore Sant’Anna of Pisa, Italy, since 2014. He received the Laurea in Electrical Engineering in 1997 from Politecnico di Torino and the M.S.E.E. and Ph.D. in Electrical Engineering Major Telecommunications from UTD in 1999 and 2001, respectively. He published more than three hundred papers in International Journals and Conference Proceedings. Dr. Valcarenghi received a Fulbright Research Scholar Fellowship in 2009 and a JSPS “Invitation Fellowship Program for Research in Japan (Long Term)” in 2013. His main research interests are optical networks design, analysis, and optimization; communication networks reliability; energy efficiency in communications networks; optical access networks; zero touch network and service management; 5G technologies and beyond.
11:40-12:00
A02_3: Create High Market Impact Along the AI Value Chain for Co-Creation of Edge Applications.
Collaboration along the AI value chain is crucial for the development, deployment, and success of AI solutions. The discussion will focus on which are the AI value chain various stages, from data collection and preprocessing to model development, deployment, ongoing optimization and what are the catalysts for increasing the collaboration.
Presentation: B02_3: Energy Optimisation for Edge Devices.
Javad Chamanara, University of Hannover, Germany.
The presentation gives an overview of RLKube, an RL-based custom Kubernetes scheduler plugin for optimized task scheduling. RLKube’s objective is to improving energy efficiency in a Kubernetes cluster. RLKube considers multiple optimization objectives, including energy optimization and Pod throughput. It utilizes DDQN with PER with different reward functions to train the RL agent. Our evaluations indicate the effectiveness of RLKube in outperforming the default Kubernetes scheduling policies in terms of throughput and energy usage.
Speaker: Javad Chamanara, University of Hannover, Germany.
Dr. Eng. Javad Chamanara has a PhD computer science. He is a research team lead at the University of Hannover Germany. His research projects are focused on federated learning, energy optimization, and privacy-aware computing. He is a participating to the CLEVER, BRAINE, and Glaciation projects to provide privacy-aware, energy optimization to federated data operations.
12:00-12:20
A02_4: Conclusions.
The discussions will focus on the co-creation of edge applications, where multiple stakeholders collaborate along the AI value chain to develop and deploy edge AI solutions, and how this co-creation have significant market impacts.
Presentation: B02_4: Edge-assisted Smart Agriculture for High Yield Eco-farms.
Alessandro Pacini, Scuola Superiore Sant’Anna, Italy.
This presentation describes the architecture and lists a preliminary set of requirements of an edge-assisted smart agriculture application for high yield eco-farms. In particular, requirements in terms of computational resources, energy, latency, transmission capacity are considered in the specific deployment of the CLEVER project.
Speaker: Alessandro Pacini, Scuola Superiore Sant’Anna, Italy.
Alessandro Pacini is a PhD student in Emerging Digital Technologies at the Scuola Superiore Sant’Anna. He received his bachelor’s degree in computer science from the University of Camerino in 2018. He then pursued his studies and obtained a joint master’s degree in computer science and Networking at the University of Pisa and Scuola Superiore Sant’Anna in 2021. During this time, he won a one-year research fellowship at SSSA focused on building a scalable and reliable monitoring architecture for optical networks. His main research interests are in the field of next-generation SD networks, with a particular focus on reusing existing network architectures to move towards a zero-touch paradigm.
12:30-13:30
Networking Lunch
13:30-15:30
Session C02: Edge AI Technology Development.
Session Co-chairs:
Reiner John, AVL LIST Gmbh, Austria.
The session will address the convergence of technologies and ecosystems in different industrial sectors and how using AI and standardisation combined with dynamic change reshapes industries, breaking down silos and fostering cross-sectoral collaboration.
Keywords: edge AI technologies, industrial sectors, technology-driven synergy, catalysts for innovation.
Session D02: Agri-Food and Beverage.
Session Co-chairs:
Markus Tauber, Research Studios Austria, Austria, Aymeric Deshayes, Laboratoire IMS, France
AI at the edge, on devices located closer to the data source, such as sensors and machinery within the agricultural and food processing sectors is advancing rapidly. It brings intelligence and automation to various processes, optimising efficiency, reducing waste, improving quality, and ensuring sustainability. The session covers several innovative edge AI applications in the domain with the goal of improving sustainability, reducing waste, enhancing quality, and ensuring agr-food and beverage safety throughout the entire supply chain.
Keywords: precision agriculture, energy efficiency, safety and traceability, resource optimisation, real-time decision support, yield prediction, disease identification, crop production optimisation.
13:30-13:50
Presentation: C02_1 – Cutting-edge Technology Development, and Ecosystems Convergence.
Reiner John, AVL LIST Gmbh, Austria.
In the realm of cutting-edge technology, the concept of ecosystem convergence takes center stage. This speech dives into the intricate interplay of industries and technologies, driving collaboration and innovation in the quest for transformative solutions, even if specific initiatives remain undisclosed. Ecosystem convergence signifies the merging of traditionally separate sectors, ushering in new synergies and unprecedented opportunities. We embark on an exploration of how this dynamic phenomenon reshapes industries, breaking down silos and fostering cross-sectoral collaboration. The evolving ecosystem is marked by its fluidity, where industries seamlessly collaborate across boundaries. We’ll delve into real-world examples of how convergence serves as a catalyst for innovation, revolutionizing fields such as smart manufacturing, sustainability practices, and beyond. At the heart of this transformation lies Artificial Intelligence, an omnipresent force driving synergy within the ecosystem. As AI permeates diverse sectors, its transformative influence aligns seamlessly with the pursuit of efficiency, digitalization, and software-defined transformations. Join us as we navigate the uncharted terrain of ecosystem convergence, propelled by a commitment to collaboration and innovation. Together, we will unlock the full potential of technology-driven synergy, reshaping the landscape of industries and technologies.
Speaker: Reiner John, AVL LIST Gmbh, Austria.
Reiner John, an accomplished electrical engineer, began his career at Siemens Semiconductor Group before transitioning to Siemens Automation Group, where he specialized in embedded control development tools. His expertise expanded into knowledge-based embedded systems and automotive systems research at Siemens’ Central Research and Development. He later held management positions at Infineon Technologies and established their Silicon Foundry Taiwan Office. Since 2007, Reiner has been instrumental in initiating and coordinating publicly funded projects. Currently, as the Coordinator of Research Funding in Corporate Strategy at AVL Graz, he focuses on advancing electromobility and driving innovation in cutting-edge technologies and AI-driven digitalization.
Presentation: D02_1: Using Edge AI in IoT Devices for Smart Agriculture Applications: Autonomous Weeding of Vegetables and Vine Health Monitoring.
Aymeric Deshayes, Laboratoire IMS, France.
Crop production uses increasingly fixed sensors in the plots, on-board sensors on tractors and robotic machines. These devices frequently have limited access to networks which make EDGE architectures particularly suitable. Through two real life use cases, this article shows how applications based on artificial vision can benefit from electronic circuits, making it possible to use artificial intelligence in low-cost EDGE architectures.
Speaker: Aymeric Deshayes, Laboratoire IMS, France.
Aymeric Deshaye is a research engineer who graduated in 2017 from the agronomic school of Bordeaux Sciences Agro, with a specialization in digital for agriculture. He is currently working at the IMS research Lab. (Bordeaux – France) in a group working more specifically on image processing applied to agriculture. Aymeric Deshayes is involved in various research projects including vine disease detection, robotic weeding and Edge Computing for Crop Monitoring. He is currently project manager for IMS Lab within the ANDANTE Project.
13:50-14:10
Presentation: C02_2: Intelligent, Safe, and Secure Connected Electrical Mobility Solutions.
Mohammed Abuteir, TTTech, Austria.
The mission of EcoMobility is to support European industry, transportation infrastructures and cities in transitioning from isolated and static transportation means towards a service-centric, connected mobility ecosystem by sharing data across involved stakeholders. The presentation will focus on the AI for edge/cloud-based service deployment, monitoring, analysis and coordination of vehicles, transportation infrastructures, people and goods.
Speaker: Mohammed Abuteir, TTTech, Austria.
Dr Mohammed Abuteir holds a PhD in Embedded Systems from the University of Siegen, Germany. His research focused on “Architecture Design for Distributed Mixed Criticality Systems based on Multi-Core Network on a Chip” with an emphasis on system architectures, reliability and adaptivity for distributed embedded real-time systems. He has also researched simulation environments for time-triggered communication. In 2017, Dr Abuteir joined TTTech, where he is involved in the management of large R&D projects in the field of safety-critical and autonomous systems, particularly in the field of autonomous driving. In his role, he coordinates and manages several projects such as the EcoMobility project and the AutoDevSafeOps project. He has also been project manager for several EC projects such as SYS2WHEEL, SAFE4RAIL-3, Up2Date, productive 4.0 and AutoDrive.
Presentation: D02_2: Vineyard Yield Prediction.
Lilian Hollard, Université de Reims Champagne-Ardenne, France.
The Value Chain Agri-food and Beverage initiative strives to equip the European Agri-food and Beverage industry with pioneering technologies, protocols, and AI algorithms. This endeavour seeks to establish the industry’s global eminence through its leadership, resilience, and contributions to achieving climate neutrality. Within the framework of this project, we showcase the latest advancements in technology and applications, with a particular emphasis on AI and edge AI methodologies. These methodologies and techniques, used predominantly in the context of vineyard yield forecasting, stand out in the yield forecasting demonstrator, which is dedicated to crafting a dependable edge AI framework for precise yield forecasting, striving for an error margin of less than 15%.
Speaker: Lilian Hollard, Université de Reims Champagne-Ardenne, France.
First year Ph.D. student at LICIIS from the University of Reims Champagne Ardenne, development of Artificial Intelligence models for viticulture: Disease identification and yield estimation. Adaptation and optimization of Deep Learning models for Edge and mobile devices.
14:10-14:30
Presentation: C02_3: PREVAIL project: Test and Experimentation Facility for the Realization and Validation of Prototype Chips Dedicated to Edge AI.
Sergio Nicoletti, CEA-Leti, France.
The PREVAIL project will establish and start operating the core of a networked, multi-hub platform providing prototype chip fabrication capability, in advanced to EU stakeholders for Artificial Intelligence (AI) applications. In this project, four major European RTOs jointly work to create a multihub Test and Experimentation Facility for edge AI Hardware (TEF HW AI) build on their advanced 300 mm fabrication, design, and test facilities. Within PREVAIL, companies and research institutions will be able to develop, test and experiment with AI product prototypes based on innovative technologies developed by the four RTOs. The technologies made available are the most promising to address the specifications (power consumption, computing performance, data handling and security) required by AI chips in general and edge AI in particular.
Speaker: Sergio Nicoletti, CEA-Leti, France.
Sergio Nicoletti Ph.D joined the CEA in 2006 to develop optical gas sensors. Nicoletti has since served as chief researcher and project leader in several industrial and collaborative projects. Currently, he coordinates the TEF-Prevail Project. He earned a doctorate in physics from Université Joseph Fourier in Grenoble, France.
Presentation: D02_3: Disease Identification for Vineyards Fields.
Lucas Mohimont, Université de Reims Champagne-Ardenne, France.
Disease Identification aims to progress with an advanced edge AI framework tailored for real-time disease detection in the field. The latest techniques are implemented within an object detection architecture, effectively enhancing the deep learning model for tomato disease prediction. This enhancement enables real-time, on-site predictions, facilitating efficient large-scale processing. In the initial stages, meta-edge analysis could contribute to generating a map of affected zones, offering champagne manufacturers and winegrowers the means to optimize the application of phytosanitary products. The presentation focuses on state-of-the-art technological and application developments with a spotlight on AI and edge AI methods and techniques used in the project.
Speaker: Lucas Mohimont, Université de Reims Champagne-Ardenne, France.
Ph.D. in Artificial intelligence for industry. Application to viticulture and COVID-19 case modelling. Lucas Mohimont is working at the University of Reims Champagne Ardenne for the development of Artificial Intelligence models for viticulture: Disease identification and yield estimation.
14:30-14:50
Presentation: C02_4 – Edge AI Standardisation Activities.
Erwin Schoitsch, AIT Austrian Institute of Technology, Austria.
Presentation and discussions on standardisation activities, EU AI Act and the challenges related to verification, validation and testing of edge AI systems.
Standardization is key to a fair, competitive society and economy. This includes technical standards, specifications and reports developed by international, European and/or industrial alliances in generic and domain-specific areas of interest. Of public interest and for public acceptance of new technologies are issues concerning safety, dependability, cybersecurity and ethical concerns, particularly in context of decision making algorithms and Artificial Intelligence. On European level, the carbon-footprint and “Green Deal” contributions play an important role as well. The presentation will provide an overview on the current efforts in standardization and by publishing guidelines and recommendations, and how they are addressed in the project AI4CSM (Automotive Intelligence for Connected Shared Mobility).
Erwin Schoitsch works more than 50 years in different positions for AIT Austrian Institute of Technology. Since his retirement in 2010 he works as Free Lancer under various subcontracts in many European Research projects for AIT and other organizations. Focus of his engagement was always on trustworthiness of highly reliable, safety-critical systems (Dependability, Safety, Cybersecurity), in industrial projects as well as European Research. He is active in many standardization groups of ISO, IEC and ISO/IEC JTC1, and the Austrian National Mirror Committees, covering topics like functional safety, cybersecurity, automated driving, Artificial Intelligence and ethical concerns. He is in several European Research Projects leading the standardization tasks.Presentation Link
Presentation: D02_4: CamFridge: Edge vs. Cloud Implementation of Object Recognition in the Fridge with Camera Use Case.
Ebrar Ömer, Arcelik, Turkey.
This study addresses a pivotal choice: adopting edge (local devices) or cloud computing for our smart camera-equipped fridge. Cloud systems utilize remote servers, while edge computing processes data instantly on devices. We aim to assess the YOLOv7 model’s efficacy in both paradigms for our smart fridge, given their distinct merits and challenges.
Speaker: Ebrar Ömer, Arcelik, Turkey.
Ebrar Ömer, is a 23-year-old computer engineering graduate from Istanbul Technical University (İTÜ). Currently, she works at Arçelik and has a deep passion for artificial intelligence and machine learning. Fluent in both Turkish and English, she aspires to build her career in these dynamic fields, contributing to the ongoing transformation of the technology landscape.
15:00-15:30
Afternoon Coffee/Tea Break
15:30-17:00
Session E02: Energy Optimisation for Edge Devices.
Session Co-chairs:
Pavel Smrz, COGNITECHNA s.r.o., Czech Republic, Paolo Meloni, Università degli studi di Cagliari, Italy
This session is dedicated to the research on power-aware edge computing, which aims to optimize edge devices’ energy efficiency and performance by dynamically adapting to the workload, communication needs, and environmental conditions. Presented papers will discuss the benefits of running optimised AI-based solutions regarding decreased power requirements and long-life operation for near real-time data processing.
Keywords: power awareness, energy efficiency, micro-power management, long battery life, dynamic adaptation to workload, energy-optimised AI, machine learning for energy optimisation.
Session F02: Edge AI Hardware Platforms.
Session Co-chairs:
Björn Debaillie, imec, Belgium, Olaf Peters, Technolution, the Netherlands.
Edge AI hardware platforms are specialised computing systems designed to accelerate and optimise the execution of AI workloads on edge devices. Various platforms are used for running AI models efficiently at the edge, where resource constraints, power efficiency, and real-time processing requirements. The session gives an overview of different technological developments addressing several edge AI HW platforms.
Keywords: multi-application HW platforms, FPGAs, Soc, SoM, MCUs, heterogeneous integration, SNN processor platforms, automated optical inspection edge AI inference platforms, heterogeneous edge systems, platforms for federated learning.
15:30-15:50
Presentation: E02_1: Tiny Transformers for On-line Processing of Sensor Data Streams on Low-power MCUs.
Paola Busia, Università degli Studi di Cagliari, Italy.
The presentation discusses the design, training and deployment of lightweight energy efficient algorithms derived from vision transformers exploited for the real-time analysis of sensor data streams. The capabilities of the presented approach are assessed on decoding and classification tasks involving biosignals. The algorithms are executed on several parallel MCU for IoT-node development.
Speaker: Paola Busia, Università degli Studi di Cagliari, Italy.
Paola Busia is assistant professor at Università degli studi di Cagliari. Her main research interests involve power efficient processing architectures for embedded applications and for at-the-edge AI.
Presentation Link
Presentation: F02_1: SNNs on FPGAs for On-line Processing of Sensor Data.
Paolo Meloni, Università degli Studi di Cagliari, Italy.
The presentation discusses the design, training and deployment of lightweight energy efficient spiking neural networks exploited for the real-time analysis of sensor data streams. The capabilities of the presented approach are assessed on decoding and classification tasks involving biosignals. The algorithms are executed on a custom SNN processor deployed on low/mid-end FPGAs.
Speaker: Paolo Meloni, Università degli Studi di Cagliari, Italy.
Paolo Meloni is associate professor at Università degli studi di Cagliari. His main research interests involve power efficient processing architectures for embedded applications and for at-the-edge AI.
15:50-16:10
Presentation: E02_2: CA-CFAR is Convolution: Fast Target Detection With Machine Learning Accelerator.
Chen Liu, Technische Universität Dresden, Germany.
In radar target detection, Constant False Alarm Rate (CFAR) is a commonly employed detector known for its simplicity and effectiveness. Its sliding-window detection mechanism possesses computational similarity to convolutional operations in machine learning. With the increasing emergence of AI-enhanced radar processing algorithms, systems at the edge are often equipped with ML accelerators to expedite matrix multiplications and convolutions. This paper introduces a heuristic algorithm that equivalently maps Cell-Averaging (CA) CFAR to a convolutional operation and leverages machine learning accelerators for acceleration. Comparative experiments against the conventional CA-CFAR algorithm executed on ARM cores demonstrate that our proposed method significantly reduces the processing latency by 38 times without incurring substantial memory overhead. This advancement brings substantial promise for potentiating real-time high-resolution radar target detection.
Speaker: Chen Liu, Technische Universität Dresden, Germany.
Chen Liu received the BSc degree and MSc degree in electrical engineering in 2012 and 2016, respectively. He is currently working toward the PhD degree in Technische Universität Dresden, Germany. His research interests include intelligent radar signal processing, efficient deep learning on the edge and neuromorphic computing in automotive.
Presentation Link
Presentation: F02_2: ANDANTE Platform: A Multi-Application Platform Supporting Several Uses Cases in the Domains Digital Farming and Transport and Smart Mobility.
Ivan Miro-Panades, CEA, France.
An IoT challenge is to provide devices supporting various applications to reduce cost and parts management. As part of ANDANTE, a multi-application platform has been developed to address 6 use cases in two different applications domains Digital Farming and Transport and Smart Mobility. Platform 4.1a is a combination of an AI ASIC accelerator, NeuroCorgi, and a commercial FPGA including an ARM core. The implementation of this platform required to make a compromise between the FPGA and the ASIC to share the ANN layers and to optimise them according to the needs of the application to guarantee high application performance (energy efficiency, latency, accuracy, and good level of integration).
Speaker: Ivan Miro-Panades, CEA, France.
Ivan MIRO-PANADES received the M.S. degree in telecommunication engineering from the Technical University of Catalonia (UPC), Barcelona, Spain, in 2002, and the M.S. and Ph.D. degrees in computer science from Pierre and Marie Curie University (UPMC), Paris, France, in 2004 and 2008, respectively. He worked at Philips Research, Sureness, France and STMicroelectronics, Crolles, France, before joining CEA, Grenoble, France, in 2008, where he is currently an Expert Research Engineer in digital integrated circuits. His main research interests are artificial intelligence, the Internet of Things, low-power architectures, energy-efficient systems, and Fmax/Vmin tracking methodologies.
16:10-16:30
Presentation: E02_3: Radar-based Reactive Planning for Drones.
Hamed Javadi, imec, Belgium.
While cameras and lidars are more common in reactive planning in drones, radars can potentially complement, or replace, them thanks to their robustness against harsh weather and extreme light conditions. To this end, appropriate signal processing algorithms are needed to tackle the poor angular resolution of radars. These algorithms, on the other hand, should fit the limitations at edge (drone). In this presentation, we present a computationally efficient synthetic aperture radar (SAR) pipeline as a solution to radar-based reactive planning in drones.
Speaker:Hamed Javadi, imec, Belgium.
S. Hamed Javadi is working as a researcher at imec, Belgium, in the fields of signal processing, sensor fusion, and AI. His current work focuses on the development of AI algorithms for radar signals which also requires strong radar signal processing as a preprocessing step. Before joining imec, S. Hamed Javadi was a postdoc at Ghent University, Ghent, Belgium, where he developed efficient AI-based algorithms for smart farming based on multiple sensors’ data. S. Hamed Javadi was also an assistant professor at the University of Bojnord, Iran, where his main focuses of interest were statistical signal processing, distributed algorithms, and machine learning.
Presentation Link
Presentation: F02_3: Automated Optical Inspection Edge AI Inference System Solutions.
Claudio Cantone, High Technology Systems H.T.S. srl, Italy and Alberto Faro, Deepsensing, DEEPS, Italy.
The presentation gives an overview of the automated optical inspection edge AI inference system solutions in digital industry by discussing if and how they allow the manufacturers to achieve a satisfactory trade-off between customer requirements and production costs. The comparison of the available solutions using KPIs, FRs and NFRs points out that AOI consisting of testing boards at the edge based on a model pre-trained on the cloud server is a promising solution if it is provided with a suitable worker interface and planning tools for managers.
Speaker: Claudio Cantone, High Technology Systems H.T.S. srl, Italy and Alberto Faro, Deepsensing, DEEPS, Italy.
Claudio Cantone received the Electronic Engineering degree from University of Pisa and the Master in Business Administration from Bocconi University. Initially he worked for several years at Philips Spa, Cinisello Balsamo, Milan in the sector of Electromedical Technical Services. Then he founded HTS srl that is a company providing Electronic Manufacturing Services (EMS) to support the entire life cycle of products in digital industry. Currently he is the Head of the HTS R&D Department.
Alberto Faro received an engineering degree from Milan Polytechnic. He was one the scientists who designed and tested the first European Informatics Network (EIN), forerunner of the Internet. From 1980 to 2016 he was Professor of Artificial Intelligence at the University of Catania where he contributed to find the Electronic and Computer Engineering Degrees. In 2019 he founded Deepsensing srl that is an innovative Startup active in the Artificial Intelligence of Things (AIoT) field.
16:30-16:50
Presentation: E02_4: Inside the AI Accelerators: From High Performance to Energy Efficiency.
Ana Pinzari, Univ. Grenoble Alpes, France.
This presentation covers current technologies for high-performance, low-power neural networks. To cope with the high computational and storage resources, hardware optimisation techniques are proposed: DL compilers and frameworks, DL hardware and hardware-specific code generator (FPGA). More specifically, in this presentation we explore the quantization mechanism in deep learning, based on a deep-CNN classification model. We highlight the accuracy of quantized models and explore their efficiency on a variety of hardware platforms. Through experiments, we show the performance achieved using general-purpose hardware (CPU and GPU) and a custom ASIC (TPU), as well as the simulated performance for a reduced bit-width representation of 4 bits, 2 bits (ternary) up to 1-bit heterogeneous quantization (FPGA).
Speaker: Ana Pinzari, Univ. Grenoble Alpes, France.
Ana Pinzari received her Ph.D degree in computer science at Université de Technologie de Compiègne, Compiègne, France in 2012, in Real-Time Embedded Systems. Then, she worked in a scientific research organization ECSI (European Electronic Chips & Systems Initiative) focusing on new design methods, tools, and standards for design of complex electronic systems. In 2021, she joined Grenoble INP, TIMA, as a post-doctoral research engineer. Her current research focuses on exploring optimisation methods for the hardware implementation of neural networks.
Presentation Link
Presentation: F02_4: Federated Learning in Cybersecurity.
Dimitrios Serpanos, CTI and University of Patras, Greece.
Federated learning constitutes a promising solution for ML/AI-enabled cybersecurity solutions in distributed environments with Edge systems. We present an efficient malware detection solution employing federated learning for environments that combine powerful as well as limited resource edge systems. We demonstrate that federated learning enables effective cybersecurity solutions for distributed environments that include heterogeneous edge systems and have constraints and limitations in data exchange, ranging from performance to IP.
Speaker: Dimitrios Serpanos, CTI and University of Patras, Greece.
Dimitrios Serpanos is president of the Computer Technology Institute & Press DIOPHANTUS and Professor of ECE at the University of Patras, Greece. He is Chair of the Scientific Council of INSIDE Industrial Association.
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Welcome and Registration
9:00-10:30
Plenary Session III: Edge AI Applications – Conference Room Attica
9:00-09:30
Technology Initiatives Converging to a Massive Edge AI Market.
Gerardo Daalderop, NXP Semiconductors, the Netherlands.
9:30-10:15
Smart sensors: paving the way for a sustainable future.
Lisa Trollo, STMicroelectronics, Italy
Sensors play a crucial role in connecting the physical and digital worlds, facilitating many of our interactions with the environment. As technology advances, people expect it to prioritize human-centeredness and foster creativity without being intrusive. To achieve this, sensors are being designed with artificial intelligence to optimize edge computing, making them a vital component in the journey towards a sustainable future. These smarter sensors can create ultralow power systems that offer innovative solutions to environmental and social challenges.
Presenter: Lisa Trollo, STMicroelectronics, Italy
After joining ST in 2012, Lisa contributed to several success stories in consumer, automotive and industrial markets, such as the massive Inertial Measurement Unit (IMU) product deployment in the smartphone industry. Always working to help developers find the best solution for their applications, Lisa is currently in charge of our MEMS Ecosystem as well as Marketing Communication where she plays a key role in defining ST’s Artificial Intelligence strategy for MEMS and sensors. Lisa graduated with a Master’s degree in Telecommunication Engineering in 2006 from The University of Trento, Italy. technologies.
10:15-10:30
Projects Pitch Presentations
LoLiPoP IoT – AI4CSM – AI4DI – EdgeAI
10:30-11:00
Morning Coffee/Tea Break
11:00-17:00
Parallel Sessions
11:00-12:30
Session A03: Intelligent Mobility Systems.
Session Co-chairs:
Alfred Höß, OTH Amberg-Weiden, Germany, Gerald Fritz-Mayer, TTTech Auto AG, Austria.
The integration of AI capabilities at the edge of a network or within vehicles, transportation, and mobility systems to enable autonomous mobility to enhance the capabilities and increase safety and reliability. These systems leverage AI algorithms and real-time data processing to make decisions, control vehicles, and navigate autonomously without relying heavily on remote cloud-based computation. The session includes presentations that address key aspects and applications of autonomous edge AI mobility systems.
Keywords: autonomous vehicles, edge AI for perception, path planning, localisation, advanced driver assistance systems, V2X communication.
Session B03: Digital Industry.
Session Co-chairs:
Celine Thermann, University of Lübeck, Germany, Claus Lenz, Cognition Factory GmbH, Germany.
The transformation and integration of digital technologies, such as data analytics, automation, the IoT, AI, and immersive technologies require the deployment of these technologies into various sectors of the economy and industrial processes. The session presents various use case employing edge AI technologies in industrial manufacturing processes that drive technological advancements and changing manufacturing patterns with a profound impact on the economy, markets, and society.
Keywords: advanced AI-based manufacturing, maintenance, repair, and operations, functional safety edge AI systems, intelligent radar signal processing.
11:00-11:20
Presentation: A03_1: AI for Connected and Shared Mobility.
Jochen Koszescha, Infineon Technologies AG, Munich, Germany.
The presentation is giving an overview of AI4CSM project that focuses on the design of highly optimized and automated components for digital mobility that allows smart and energy efficient fleet operations in terms of smart routing and platooning achieving low latency in the vehicle intelligence and perception systems. This means not only smart sensor fusion, but also reducing the level of complexity by using functional architectures and trustable automotive AI, to foster Europe’s competitiveness in the global automotive market. The vision of AI4CSM is to build Europe’s intelligent electronic component and systems for ECAS 2030 vehicles supporting European mass market production, manufacturability and scalability based on the Green Deal principles (incl. Vision Zero and Safe System) to address the sustainable urbanization challenge defined by the United Nations.
Speaker: Jochen Koszescha, Infineon Technologies AG, Munich, Germany.
Jochen Koszescha is a senior director at Infineon Technologies AG with over 30 years of experience in Electronic Components and Systems at the Aviation and Transport Industries. He has been coordinating several research and development projects at Infineon.
Presentation: B03_1: Distributed Multisensory System, from Pre-Development to Production.
Claus Lenz, Cognition Factory GmbH, Germany.
This talk showcases the industrial use-case of a distributed multisensory system applied in the field of Maintenance, Repair, and Operations. It highlights the advantages and challenges of a distributed architecture of sensor nodes, capable of independent functioning and data processing. The presentation covers the development cycle from the Requirement formulation phase, up to Deployment and Maintenance. Emphasis is made on certifiable approach to AI-based solutions, and delegation of intelligence to the edge, as well as an architectural design that is scalable both vertically and horizontally.
Speaker: Claus Lenz, Cognition Factory GmbH, Germany.
CEO and co-founder of Cognition Factory GmbH. PhD in human-robot collaboration at Technische Universität München (TUM). Experienced within research projects aimed at digitising the industry: AI4DI, Providentia++, DiProLea.
11:20-11:40
Presentation: A03_2: Natural Language Conditioned Planning of Complex Robotics Tasks.
Janis Arents, Institute of Electronics and Computer Science, Riga, Latvia.
As natural language processing advances in the field of robotics, enabling seamless human-robot interaction, it becomes imperative to identify the most effective approach for conditioning complex robotics tasks using natural language commands. This chapter reviews various state-of-the-art methods for natural language-conditioned planning, with a particular focus on mobile manipulation. We explore and review different architectures and techniques to comprehend, interpret, and execute natural language commands. Challenges are identified along the way, and conceptual architecture is proposed to tackle them in an efficient manner.
Speaker: Janis Arents, Institute of Electronics and Computer Science, Riga, Latvia.
Researcher Janis Arents has been working in EDI since 2016. Graduated Riga Technical University (Riga, Latvia) in the year 2018 with professional master’s degree in electrical engineering. Currently studying in Riga Technical University in Computerised Control of Electrical Technologies doctors’ degree program. Main research topics are connected with innovative digital technology usage in industrial applications, including computer vision and artificial intelligence-based systems for industrial process automation. Presentation Link
Presentation: B03_2: Outlook on the Deployment and Execution of Mixed-Criticality Edge-AI Applications.
Suzana Veljanovska, Zurich University of Applied Sciences, Switzerland.
Functional safety-relevant edge AI systems are the cutting of AI research, and the technological gap is significant. In this presentation we approach the issue of creation and deployment of both typical AI applications and functional safety systems. We pay particular attention to the merging of the two workflows and present options and ideas to achieve this.
Speaker: Suzana Veljanovska, Zurich University of Applied Sciences, Switzerland.
Suzana Veljanovska is a research assistant at Zurich University of Applied Sciences (ZHAW) working in the field of dependable AI.
11:40-12:00
Presentation: A03_3: Dynamic LoRa Broadcasting and Obstacle Prediction.
Dimitris Georgiadis, Harokopio University of Athens, Greece.
This presentation covers significant achievements in the development of a LoRa-based emergency communication network for highly automated vehicles, validated through simulations using NS3. The simulation comprises stationary infrastructure, including a gateway a network server, and multiple mobile vehicles acting as end devices. Concluding in this research project we present a significant advancement in LoRa-based emergency communication simulations, with achievements in realistic mobility modelling, communication protocols, and visualization tools. Ongoing efforts are focused on enhancing emergency responsiveness focused on obstacle recognition, optimizing communication reliability, and accelerating the network’s adaptability to dynamic scenarios.
Speaker:Dimitris Georgiadis, Harokopio University of Athens, Greece.
Dimitris Georgiadis is a research associate at Harokopio University of Athens. His works focus on 5G D2D single-cell communications and minimization of energy consumption, UAV swarm communications and currently studying vehicle behavior. Graduate from Harokopio University of Athens from the Department of Informatics and Telematics and is now a postgraduate Student of Master Programme (MSc) MPhil in Computer Science and Informatics.
Presentation Link
Presentation: B03_3: RANet: An Autoencoder for High-Resolution Range-Angle Maps in Multistatic Radar.
Chen Liu, Technische Universität Dresden, Germany.
Advanced radar perception tasks, such as target recognition and tracking, often impose strict requirements on radar imaging quality. However, conventional radar imaging methods are constrained by spatial angular resolution, which is limited by the number of virtual channels composed by the antenna array, thus leading to suboptimal performance of low-cost, low-resolution radar systems. This paper introduces an innovative deep learning model: RANet, which leverages the raw sampling signals from multiple radar sensors to generate high-resolution range-angle maps in an end-to-end manner. RANet not only partially replaces the traditional radar processing chain but also demonstrates superior performance in downstream tasks such as object counting and tracking. Experimental results indicate that monitoring up to four indoor individuals achieves an accuracy of 96.4% by exploiting accumulated temporal information of only two 1T3R (one transmitter, three receivers) radar sensors.
Speaker: Chen Liu, Technische Universität Dresden, Germany.
Chen Liu received the BSc degree and MSc degree in electrical engineering in 2012 and 2016, respectively. He is currently working toward the PhD degree in Technische Universität Dresden, Germany. His research interests include intelligent radar signal processing, efficient deep learning on the edge and neuromorphic computing in automotive.
12:00-12:20
Presentation: A03_4: Edge Perception in Autonomous Driving.
Gerhard Dorn, Virtual Vehicle Research GmbH, Austria.
The talk gives a small introduction to our current work on the autonomous driving Robotaxi within the EU project AI4CSM and focusses on development and integration techniques of edge perception algorithms using Julia for machine learning tasks. Challenges regarding data quality, data sources, uncertainties, and run-time issues as well as opportunities regarding fast prototyping and integration will be discussed.
Speaker:Gerhard Dorn, Virtual Vehicle Research GmbH, Austria.
Gerhard Dorn is a senior scientist at Virtual Vehicle Research GmbH with a background in mathematics and computational physics.Within the project AI4CSM Gerhard works on LIDAR perception and the integration into the test vehicle Ford Mondeo.Presentation Link
Presentation: B03_4: Smart Semiconductor Manufacturing Assistant (SSMA) – An Efficient Quality Management Supporting Tool.
Houssam Razouk, Infineon, Austria.
Smart Semiconductor Manufacturing Assistant (SSMA) as an efficient quality management support tool is an important step in the direction of establishing causal links between production-related data such as production equipment and process parameters, data resulting from process experiments as well as knowledge from FMEAs. This allows potential risks to be quickly identified, predicted, and classified to support the engineer in decision making.
Speaker: Silke Braun, Infineon, Austria.
Silke Braun completed her studies in microsystems engineering at Mittweida University of Applied Sciences (Germany). In 2017, she started working at Infineon Technologies Dresden as a defect density and metrology engineer; since 2018 in Villach (Austria). She strengthened her knowledge in the field of quality management, among others for new technologies like GaN. Since 2022, she focuses her work on the field of funding and works in various EU-funded projects.
12:30-13:30
Networking Lunch
13:30-15:00
Session C03: Autonomous Vehicle Domains Applications.
Session Co-chairs:
Jochen Koszescha, Infineon Technologies AG, Germany, George Dimitrakopoulos, Harokopio University of Athens, Greece.
The integration of AI capabilities at the edge of a network or within vehicles, transportation, and mobility systems to enable autonomous mobility to enhance the capabilities and increase safety and reliability. These systems leverage AI algorithms and real-time data processing to make decisions, control vehicles, and navigate autonomously without relying heavily on remote cloud-based computation. The session includes presentations that address key aspects and applications of autonomous edge AI mobility systems.
Keywords: autonomous vehicles, edge AI for perception, path planning, localisation, advanced driver assistance systems, V2X communication.
Session D03: Digital Society.
Session Co-chairs:
Fetze Pijlman, Signify, the Netherlands, Astrid Khokhar, SoftwareCUBE, Austria, Peet van Tooren, Almende, the Netherlands.
The deployment of AI capabilities directly at the edge of the network or on devices within a digitally connected society plays a pivotal role in shaping how technology interacts with individuals and communities, enabling real-time decision-making, enhancing user experiences, and ensuring data privacy. The session focus on several presentations that highlight the use of edge AI in digitising the society by promoting efficiency, responsiveness, and data privacy while enhancing the quality of life and safety for individuals and communities advancing the development of a more connected and intelligent world.
Keywords: smart working environments, digital healthcare, augmented reality, event-based intelligence, environmental monitoring.
13:30-13:50
Presentation: C03_1: SNN-based Accelerators for Low-latency, Ultra-low-power Inference at the Edge.
Maxim Rykunov, imec, Belgium.
State-of-the-art currently focuses on conventional deep neural network architectures for classification lacking in power, performance, and scalability especially for the processing at the edge. In this talk we present two designed and evaluated neuromorphic prototypes to be demonstrated in the AI4CSM project. One of these solutions focuses on a HW/SW co-design based on a spiking neural network and embedded processing for automatic detection, tracking and classification of multiple vulnerable road users. The second one targets the development of a programmable analogue-mixed signal accelerator platform for always-on detection and recognition of time-series patterns in sensor data. Neuromorphic SNN-based approaches are critical in such applications, where we demonstrate novel energy-efficient platforms based for low-latency, ultra-low-power inference at the edge.
Speaker: Maxim Rykunov, imec, Belgium.
Maxim Rykunov received the Ph.D. degree in electrical and electronic engineering from Newcastle University, Newcastle, U.K., in 2013, in asynchronous microprocessors and design of power efficient systems. In 2014, he joined IMEC, Leuven, Belgium, where he is currently a Project Manager in Advanced RF group. His research interests include real-time embedded systems for heterogeneous multisensor data fusion and energy-efficient machine learning for high-resolution radars.
Presentation Link
Presentation: D03_1: On the Move Biometrics at the Edge: Security Meets Convenience.
Emanuele Maiorana, Roma Tre University, Italy.
Biometric recognition systems are used to validate the identity of an individual and among the main candidates to be used in contexts with high security requirements (e.g., airports, or border control). Interacting with a biometric recognition system requires a user to stop at a terminal for the time necessary to acquire the relevant traits. In contexts requiring the management of large flows of people, such procedure could lead to the creation of long lines, resulting in discomfort for the involved subjects. To deal with this issue, we propose an “on-the-move” solution where subjects to not need to stop at a gate during the recognition process, since the interested characteristics can be captured while users continue to walk, thus increasing the system throughput and improving passengers’ convenience. The required processing is performed at the edge, thus realising a reliable, low-cost, and convenient system to perform security checks within an airport. In more detail, the proposed system relies on a multimodal approach exploiting face traits to trigger the recognition process at a distance, and subcutaneous vein patterns to guarantee the desired robustness against malicious spoofing attempts.
Speaker: Emanuele Maiorana, Roma Tre University, Italy.
Emanuele Maiorana received the Ph.D. degree in biomedical, electromagnetism, and telecommunication engineering from Roma Tre University, Rome, Italy, in 2009, with European Doctorate Label. He is currently an Assistant Professor with the Department of Industrial, Electronic and Mechanical Engineering, Roma Tre University. His research interests are in digital signal and image processing, with a specific emphasis on biometric recognition. Dr. Maiorana was a recipient of the Lockheed Martin Best Paper Award for the Poster Track at the IEEE Biometric Symposium 2007, the Honeywell Student Best Paper Award at the IEEE Biometrics: Theory, Applications and Systems Conference 2008, and the Best Paper Award at the 11th International Conference on Pattern Recognition Applications and Methods (ICPRAM) 2022. He was the General Chair of the 9th IEEE International Workshop on Biometrics and Forensics (IWBF) 2021. He is an Associate Editor of the IEEE TRANSACTIONS ON INFORMATION FORENSICS AND SECURITY.
13:50-14:10
Presentation: C03_2: Embedding ROS and Edge AI-Based Perception Capabilities in AV Platforms.
Ovidiu Vermesan, SINTEF, Norway.
Autonomous vehicles operating in fleets are cognitive agents using perception modules to process images, GNSS positions or LIDAR scans for autonomous system decision-making, resulting in actions, such as actuator commands or C2X messages. The high degree of interdependencies between many functional components of autonomous vehicles requires the implementation of new system architectures and new underlying software frameworks. This presentation describes the concept for embedding Robot Operating System (ROS) into a compact, scalable, AI-based perception and localization system for autonomous vehicles used for transport of goods applications. The system is composed of a LiDAR, a stereo camera, an inertial navigation system, and an AI-based embedded computing unit.
Presenter: Ovidiu Vermesan, SINTEF, Norway.
Dr Ovidiu Vermesan is Chef Scientist at SINTEF Digital, Oslo, where he is involved in applied research on future edge autonomous intelligent systems and edge AI, wireless sensing devices and networks, smart systems integration, microelectronics design of integrated systems (analogue and mixed signal), IIoT. He holds a PhD in Microelectronics and a Master of International Business (MIB). His applied research activities focus on advancing edge AI processing, embedded electronics, wireless and smart sensing technologies, and the convergence of these technologies and applying the developments to applications such as green mobility, energy, buildings, autonomous systems, electric connected, autonomous, and shared vehicles, and industrial manufacturing. He is currently the coordinator of the Edge AI Technologies for Optimised Performance Embedded Processing (EdgeAI) project.ModAL, 3CCar and AutoDrive.Presentation Link
Presentation: D03_2: AI-enabled Resource Optimization in Critical Computing Infrastructures.
Prodromos Makris, National Technical University of Athens, Greece.
The seamless orchestration of resources across the edge-cloud continuum has become a cornerstone in modern critical computing infrastructures. Artificial Intelligence (AI) plays a pivotal role in enabling the fast and efficient management of diverse and demanding workloads. However, maintaining data security, while optimizing resources can be a significant challenge especially in multi-domain environments. AI emerges as a key enabler as it not only increases the robustness and reliability of the distributed computing environments but also contributes in designing resilient orchestration mechanisms across various critical computing domains. The integration of AI within the common resource optimization frameworks, significantly elevates the capabilities of a distributed computing infrastructure and can ensure a future where resource optimization and security are harmoniously balanced to meet the demands of the digital era.
Speaker: Prodromos Makris, National Technical University of Athens, Greece.
Dr. Prodromos Makris is a senior researcher at ICCS/NTUA (National Technical University of Athens), Greece. He holds a 5-year BSc (2007), MSc (2009), PhD (2013) from University of the Aegean, Greece. During the last years, he has been actively participating and leading several national and EC-funded research and innovation projects collaborating with many industrial and academic partners in the EU area. His research interests include energy efficient ICT, resource allocation in IoT-edge-cloud continuum and context-aware mobile/wireless networking in the 5G/6G era. He has more than 60 publications in international conferences and journals. He has recently served as technical manager of FP7 VIMSEN-GA-619547, H2020-GA-731767 SOCIALENERGY and H2020-GA-863876 FLEXGRID projects. He also serves as Adjunct Lecturer at the University of the Aegean.
14:10-14:30
Presentation: C03_3: Reward Shaping for Safe Reinforcement Learning Controllers.
Lorenz Klampfl, AVL List GmbH, Austria.
The performance of controllers based on reinforcement learning heavily depends on designing appropriate reward functions. With poorly designed rewards, an agent can behave unsafely, non-optimal, learn how to obtain the reward without achieving the desired goals, or take too long to learn a policy. In this talk, we give an overview of formal specifications to automatically provide locally shaped rewards. The advantage of such an approach is that we can address all the above-mentioned challenges efficiently.
Speaker: Lorenz Klampfl, AVL List GmbH, Austria.
Lorenz Klampfl holds an M.Sc. in Aviation (2017), is currently pursuing a Ph.D. in Computer Sciences at Graz University of Technology and works as a Simulation Engineer at AVL List GmbH. He is conducting research on quality assurance methodologies for autonomous cyber-physical systems, including the reliability and trustworthiness of neural networks and reasoning techniques for autonomous systems, at the Institute of Software Technology. In his role as a Simulation Engineer, he focuses on the development of ADAS/AD verification and validation methodologies in virtual environments as well as on the edge.Presentation Link
Presentation: D03_3: Quantization- and HW-aware Neural Architecture Search for EdgeAI Solutions.
Gerardo Daalderop, NXP Semiconductors, the Netherlands.
To a significant extent, future smartness in devices of the digital society will originate from neural networks embedded in these devices. However, today typically neural network (NN) models are solely trained to improve the performance of the prediction-the primary task-, without considering the embedded constraints of the devices in which these models will be deployed. Afterwards in a separate process, the models are adapted to fit memory, computation, and performance requirements. The presentation introduces the concept of multi-objective quantization-aware neural architecture search, wherein optimization techniques like quantization and pruning, are combined with HW-aware neural architecture search (NAS). NAS has become a very successful technique for optimizing neural networks, and in HW-aware NAS the properties of the embedded device are brought into the loss-function and training loop, allowing optimization both towards the primary task, as well as secondary objectives being non-functional requirements. A few examples will be given highlighting the benefits of the approach.
Speaker: Gerardo Daalderop, NXP Semiconductors, the Netherlands.
Gerardo Daalderop (PhD, MBA) is a technical director at NXP Semiconductors, having in recent years built-up an AI ML Innovation Center in its Central Technology Office, focusing on AI ML innovations for the Edge beyond next generation products, and across segments as mobility, industrial, home/office, IoT. Before this, he has set up and led groups, roadmaps, programs, and projects in the areas of highly automated driving and safe mobility, safe and secure wireless, telematics and multi-standard communication solutions, and the connected consumer, always with the guiding principle to identify and address highly valued use-cases and user-needs with differentiating technologies, tested and demonstrated in practical trial-environments. As such he has also participated in numerous national and transnational cooperation projects.
14:30-14:50
Presentation: C03_4: Connectivity and Cognitive Communication for Future Shared Mobility.
Gerald Fritz-Mayer, TTTech Auto AG, Austria.
The talk presents the current developments w.r.t. cognitive communication which enables AI-powered methods to access data from both the edge and the cloud, providing fast, reliable, and low-latency data connections. The presentation will showcase the respective demonstrators of (a) proof of concept communication platform and (b) novel technologies to prove wireless data transmission on 28GHz mmW frequency.
Speaker: Gerald Fritz-Mayer, TTTech Auto AG, Austria.
Gerald Fritz-Mayer (male) graduated in computer science at the Technical University of Graz and has an MBA degree on Entrepreneurship and Innovation from the Vienna University of Economics and Business. He joined TTTech as senior coordinator R&D project 2017 and is concerned with autonomous system in the field of manufacturing and autonomous driving. Beside that he participated in several national and European research projects, he was coordinating the innovation in various national research projects in the field of assistive system for future manufacturing systems. Gerald Fritz-Mayer is an IEEE member and serves in different officer roles in the robotic chapter Austria (RAS) and the Technology and Engineering Management Society (TEMS) Austria.
Presentation Link
Presentation: D03_4: Accelerating Magnetic Resonance Imaging on Heterogeneous Edge Compute Platforms.
Yousef Alnaser, Jan Langer, Fraunhofer ENAS, Germany.
Simulating magnetic resonance imaging (MRI) is a computationally expensive task, that is based on solving the Bloch equations for every voxel and time step. Ideally, the simulation runs in real time on premise with confidential customer data, hence requiring a powerful edge acceleration platform. We developed a fully software-programmable and scalable solution for FPGA platforms achieving multiple magnitudes of performance increase. In this talk we will illustrate the opportunities and challenges we faced during this process.
Speaker: Jan Langer, Fraunhofer ENAS, Germany.
Jan Langer (MS’05 and PhD’11 in Electrical Engineering) leads the artificial intelligence team at Fraunhofer ENAS. Before that, he worked as a senior researcher and processor architect at Xilinx in the heterogeneous multi-core architectures team which developed the AI Engine. His current research at ENAS includes creating hybrid digital twins for semiconductor processes, as well as accelerating algorithms on edge AI platforms.
15:00-15:30
Afternoon Coffee/Tea Break
15:30-17:00
Edge AI Cluster Internal Meeting
17:00
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Parallel Session A01: Title – Room A01
Architecting Edge AI Workflows for Predictive Maintenance in Industrial Applications
This presentation highlights on the importance of properly architecting the AI workflows for the design, development, and deployment of predictive maintenance applications in industrial applications at the edge. It is advocated that the selection of the frameworks/platforms employed for the task largely depend on the application, IIoT devices and their physical operating environments, rather than on the available knowledge and experience of the people, as suggested in similar literature. For this purpose, it was employed several existing AI frameworks and inference engines, that permit end-to-end solutions with various degree of automation and integration with Arm® Cortex®-M-based MCUs. The presentation addresses the verification and validation aspects of model design, development, and deployment of AI-based industrial applications and provides quantitative and qualitative insights that can ultimately allow the use of the right framework. The use case presented is a classification for predictive maintenance based on the vibration of generic rotating equipment (such as motors with vibration pumps, fans, compressors), common to many industrial applications, such as manufacturing.
Speaker
Ovidiu Vermesan (SINTEF, Norway)
Ovidiu Vermesan is Chief Scientist at SINTEF Digital, Oslo, where he is involved in applied research on future edge autonomous intelligent systems and edge AI, wireless sensing devices and networks, smart systems integration, microelectronics design of integrated systems (analogue and mixed signal), IIoT. He holds a PhD in Microelectronics and a Master of International Business (MIB). His applied research activities focus on advancing edge AI processing, embedded electronics, wireless and smart sensing technologies, and the convergence of these technologies in different industrial sectors.
Presentation A01_1 – Name Presentert, Company Affiliation, Country
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Presentation A01_2 – Name Presentert, Company Affiliation, Country
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Presentation A01_3 – Name Presentert, Company Affiliation, Country
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| Networking Lunch |
Parallel Session C01: Title – Room C01
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Presentation C01_1 – Name Presentert, Company Affiliation, Country
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Presentation C01_4 – Name Presentert, Company Affiliation, Country
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| Afternoon Coffee/Tea Break |
Parallel Session E01: Title – Room E01
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Presentation E01_1 – Name Presentert, Company Affiliation, Country
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Presentation E01_2 – Name Presentert, Company Affiliation, Country
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Presentation E01_3 – Name Presentert, Company Affiliation, Country
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Presentation E01_4 – Name Presentert, Company Affiliation, Country
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| End |
| Dinner |
Parallel Session B01: Title – Room B01
Architecting Edge AI Workflows for Predictive Maintenance in Industrial Applications
This presentation highlights on the importance of properly architecting the AI workflows for the design, development, and deployment of predictive maintenance applications in industrial applications at the edge. It is advocated that the selection of the frameworks/platforms employed for the task largely depend on the application, IIoT devices and their physical operating environments, rather than on the available knowledge and experience of the people, as suggested in similar literature. For this purpose, it was employed several existing AI frameworks and inference engines, that permit end-to-end solutions with various degree of automation and integration with Arm® Cortex®-M-based MCUs. The presentation addresses the verification and validation aspects of model design, development, and deployment of AI-based industrial applications and provides quantitative and qualitative insights that can ultimately allow the use of the right framework. The use case presented is a classification for predictive maintenance based on the vibration of generic rotating equipment (such as motors with vibration pumps, fans, compressors), common to many industrial applications, such as manufacturing.
Speaker
Ovidiu Vermesan (SINTEF, Norway)
Ovidiu Vermesan is Chief Scientist at SINTEF Digital, Oslo, where he is involved in applied research on future edge autonomous intelligent systems and edge AI, wireless sensing devices and networks, smart systems integration, microelectronics design of integrated systems (analogue and mixed signal), IIoT. He holds a PhD in Microelectronics and a Master of International Business (MIB). His applied research activities focus on advancing edge AI processing, embedded electronics, wireless and smart sensing technologies, and the convergence of these technologies in different industrial sectors.
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Parallel Session D01: Title – Room D01
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Presentation D01_1 – Name Presentert, Company Affiliation, Country
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Presentation D01_4 – Name Presentert, Company Affiliation, Country
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Parallel Session F01: Title – Room F01
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Presentation F01_1 – Name Presentert, Company Affiliation, Country
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Presentation F01_3 – Name Presentert, Company Affiliation, Country
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Presentation F01_4 – Name Presentert, Company Affiliation, Country
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Performance models and energy-optimal scheduling of DNNs on many-core hardware with dynamic power management
Bernhard Vogginger, Florian Kelber, Shambhavi Balamuthu Sampath, Johannes Partzsch, Christian Mayr
13.10.2022
Workshop on Compilers, Deployment, and Tooling for Edge AI
Performance models and energy-optimal scheduling of DNNs on many-core hardware with dynamic power management
Bernhard Vogginger, Florian Kelber, Shambhavi Balamuthu Sampath, Johannes Partzsch, Christian Mayr
13.10.2022
Workshop on Compilers, Deployment, and Tooling for Edge AI
Performance models and energy-optimal scheduling of DNNs on many-core hardware with dynamic power management
Bernhard Vogginger, Florian Kelber, Shambhavi Balamuthu Sampath, Johannes Partzsch, Christian Mayr
13.10.2022
Workshop on Compilers, Deployment, and Tooling for Edge AI
Performance models and energy-optimal scheduling of DNNs on many-core hardware with dynamic power management
Bernhard Vogginger, Florian Kelber, Shambhavi Balamuthu Sampath, Johannes Partzsch, Christian Mayr
13.10.2022
Workshop on Compilers, Deployment, and Tooling for Edge AI
Performance models and energy-optimal scheduling of DNNs on many-core hardware with dynamic power management
Bernhard Vogginger, Florian Kelber, Shambhavi Balamuthu Sampath, Johannes Partzsch, Christian Mayr
13.10.2022
Workshop on Compilers, Deployment, and Tooling for Edge AI
Performance models and energy-optimal scheduling of DNNs on many-core hardware with dynamic power management
Bernhard Vogginger, Florian Kelber, Shambhavi Balamuthu Sampath, Johannes Partzsch, Christian Mayr
13.10.2022
Workshop on Compilers, Deployment, and Tooling for Edge AI
Performance models and energy-optimal scheduling of DNNs on many-core hardware with dynamic power management
Bernhard Vogginger, Florian Kelber, Shambhavi Balamuthu Sampath, Johannes Partzsch, Christian Mayr
13.10.2022
Workshop on Compilers, Deployment, and Tooling for Edge AI
Performance models and energy-optimal scheduling of DNNs on many-core hardware with dynamic power management
Bernhard Vogginger, Florian Kelber, Shambhavi Balamuthu Sampath, Johannes Partzsch, Christian Mayr
13.10.2022
Workshop on Compilers, Deployment, and Tooling for Edge AI
Performance models and energy-optimal scheduling of DNNs on many-core hardware with dynamic power management
Bernhard Vogginger, Florian Kelber, Shambhavi Balamuthu Sampath, Johannes Partzsch, Christian Mayr
13.10.2022
Workshop on Compilers, Deployment, and Tooling for Edge AI
8:30-9:00
Welcome and Registration
9:00-17:00
Poster Session: 17-19 October, 2023
Poster: P01: Designing Trustworthy and Useful AI Applications: The Role of Human Oversight.
Nikolai Ebinger, Peter Moertl, Michael Karner, Virtual Vehicle Research GmbH, Austria, Bettina Kubicek University of Graz, Austria.
AI is revolutionizing entire industries, but it cannot completely replace humans in many application areas. However, the human role is often not adequately considered in the design process, resulting in AI applications that challenge human operators to effectively oversee them – leading to distrust, undesired outcomes, and abandonment of the AI applications. To address this chain of distrust, we will present a model for human oversight of AI that builds on the experiences of the InSecTT project and sheds more light on the process behind and requirements for effective human-AI collaboration.
Poster: P02: Human acceptance and AI based Digital Workspaces.
Markus Tauber, Research Studios Austria, Austria.
Acceptance of AI in industry and e.g., technology uptake depends on ethics, legal norms, and trust. To support this acceptance, we are working on the production of guidelines and self-assessment approaches to support the evaluation of compliance with given standards and norms of AI based industrial solutions. A first initial step is the documentation of the existing landscape and stakeholder environment and requirements under consideration of the increasing popularity of technologies such as Large Language Models.
Poster: P03: Digital Industry.
Silke Braun, Josef-Anton Moser, Infineon, Austria.
Digitised control systems with advanced sensing, automated defect classification, virtual metrology and the implementation of a digital tacit knowledge platform are the clear vision for semi- autonomous AI supported production environment for a sustainable and resilient European Digital Industry. The value chain integrates the edge AI technological developments into six demonstrators.
Poster: P04: Energy Industry.
Ovidiu Vermesan, SINTEF AS, Norway.
Energy value chain develops advanced distributed edge AI technologies for applications and services at the intersection of mobility, energy and building industrial sectors to support the European stakeholders driving the engine for innovation and entrepreneurship in sustainable energy. The value chain integrates the edge AI technological developments into four demonstrators.
Poster: P05: Agri-food and Beverage.
Marcello Coppola, STMicroelectronics, France.
Agri-food and Beverage value chain develops technologies, procedures, and AI algorithms to make European agri-food and beverage industry globally renowned for its leadership, resilience, and contribution to climate neutrality. The value chain integrates the edge AI technological developments into four demonstrators.
Poster: P06: Mobility Industry.
Janis Arents, EDI, Latvia.
Mobility value chain develops edge AI-based perception, cognition, and monitoring technologies to advance the mobility sector in three different aspects: the mobile agent (e.g., drones, UAVs, UGVs and other vehicles), stationary and mobile multi-agent collaboration (distributed edge intelligence), and infrastructure. These technologies are key to enable connected and automated mobility with increased energy-efficiency, reliability, privacy, and reusability for both indoor and outdoor applications. The value chain integrates the edge AI technological developments into three demonstrators.
Poster: P07: Digital Society.
Gerardo Daalderop, NXP Semiconductors, the Netherlands.
Digital society requires the closer integration of technological systems and human users. This requires those systems to accurately interpret real world stimuli, inferring activity and intention. Such stimuli are poorly differentiated, indistinct, and contradictory. AI’s promise is to provide interpretation of stimuli in these situations that cannot be adequately modelled in the traditional way, thus allowing reactive processes to be better informed and enabling a closer integration of humans and digital infrastructure. The value chain integrates the edge AI technological developments into three demonstrators.
Poster: P08: Non-Volatile Memory (NVM) based In-Memory Computing (IMC) solutions of ANDANTE project.
Alexandre Valentian, CEA, France, Mario Diaz Nava, STMicroelectronics, France.
In data-centric applications, such as AI, memory accesses consume a large part of the total energy dissipation. This is why doing computations in-memory is one of the key solutions for reducing power at the edge. Furthermore, as the number of neural network parameters increases over time, relying on dense non-volatile embedded memories avoids duplicating memories and loading a considerable number of weights at each start up. Results shown here illustrate analog In-Memory Computing solutions, leveraging respectively MRAM, OxRAM and FeFET technologies.
Poster: P09: Edge vs. Cloud Implementation of Object Recognition in the Fridge with Camera Use Case.
Ebrar Ömer, Arcelik, Turkey.
In the Arçelik CamFridge smart refrigerator project, two cameras are strategically positioned one on the door and the other on the body This setup enables remote access for users to view refrigerator contents from their phones and explore eco friendly purchasing alternatives.
Poster: P10: EcoMobility: For a Sustainable Society with Intelligent Mobility Solutions.
Mohammed Abuteir, TTTechAuto, Austria Vicky Chatzidogiannaki, Innovation Dis.Co, Greece.
EcoMobility will develop and demonstrate a data driven framework for connected/ electric vehicles to enable a digital mobility ecosystem. The vision of the project is a sustainable door to door mobility based on autonomous vehicles with agile lifecycle mangement for improved safety, efficiency and ecology.
Poster: P11: Preparing corporates for the challenges of edge computing.
Jose Enrique Alvarez, BluSpecs, Spain.
With increasing computing and processing needs, edge computing will join cloud computing as the next important part of digital infrastructures. The convergence of Cloud and Edge will serve as an enabler of future developments. The growing need for edge computing solutions and building CEI networks is reflected in the analysis of expected spending on enterprise edge, estimated to double in the upcoming year. However, while industries and companies see CEI technologies’ potential for their business, not all of them are equally prepared or have the resources or skills to implement them successfully. Knowing how prepared they are to do so is critical to taking the proper steps to migrate to Edge Computing.
Poster: P12: Edge AI project.
Athanasia Thraskia, ITML, Greece, Teresa Koniari, ITML, Greece.
The poster gives an overview of the EdgeAI – Edge AI Technologies for Optimised Performance Embedded Processing, Key Digital Technologies (KDT) Joint Undertaking (JU) project, which is a key initiative for the European digital transition towards intelligent processing solutions at the edge. EdgeAI develops new electronic components and systems, processing architectures, connectivity, software, algorithms, and middleware by combining microelectronics, AI, embedded systems, and edge computing.
Poster: P13: Intelligent Motion Control under Industry4.E.
Vina Rompoti, GNT, Greece, Ilektra Simitsi, ITML, Greece, Athanasia Thraskia, ITML, Greece.
IMOCO4.E focuses on delivering an edge-to-cloud intelligence platform for cyber-physical systems, emphasizing digital twins and AI principles. This platform aims to enhance energy efficiency, reconfigurability, traceability, and cybersecurity in manufacturing applications, particularly in semiconductors, packaging, robotics, and healthcare, with potential applications in other motion control domains. IMOCO4.E’s impact extends across the production automation value chain.
Poster: P14: HW Design of Edge AI processors implementing Spiking and Artificial Neural Networks using different embedded Non-Volatile Memory technologies.
Mario Diaz Nava, STMicroelectronics, France, Loreto Mateu Saez, Fraunhofer/IIS, Germany, Ivan Miro-Panades, CEA, France.
Optimal Edge AI solutions require high energy efficiency, low latency, and high integration. In the ANDANTE project, 14 circuits have been implemented in different novel eNVM (RRAM/OXRAM, FeFET and PCM) and FPGAs technologies. These designs cover different Neural Networks architectures (spiking, artificial and analogue). These circuits are being validated in several application domains: Digital Industry, Digital Farming, Transport and Smart Mobility, Healthcare and Digital life. This poster presents the circuits’ architecture and the main characteristics of each of them.
17:00
End
17:00
End
| 11:00-12:30 |
| 11:00-11:20 |
| 11:20-11:40 |
| 11:40-12:00 |
| 12:00-12:20 |
| 12:30-13:30 |
| 13:30-15:30 |
| 13:30-13:50 |
| 13:50-14:10 |
| 14:10-14:30 |
| 14:30-14:50 |
| 15:30-16:00 |
| 16:00 |
| 16:00 |
| 16:00 |
| 16:00 |
| 16:00 |
| 17:30 |
| 20:00 |
Parallel Session A01: Title - Room A01
Architecting Edge AI Workflows for Predictive Maintenance in Industrial Applications
This presentation highlights on the importance of properly architecting the AI workflows for the design, development, and deployment of predictive maintenance applications in industrial applications at the edge. It is advocated that the selection of the frameworks/platforms employed for the task largely depend on the application, IIoT devices and their physical operating environments, rather than on the available knowledge and experience of the people, as suggested in similar literature. For this purpose, it was employed several existing AI frameworks and inference engines, that permit end-to-end solutions with various degree of automation and integration with Arm® Cortex®-M-based MCUs. The presentation addresses the verification and validation aspects of model design, development, and deployment of AI-based industrial applications and provides quantitative and qualitative insights that can ultimately allow the use of the right framework. The use case presented is a classification for predictive maintenance based on the vibration of generic rotating equipment (such as motors with vibration pumps, fans, compressors), common to many industrial applications, such as manufacturing.
Speaker
Ovidiu Vermesan (SINTEF, Norway)
Ovidiu Vermesan is Chief Scientist at SINTEF Digital, Oslo, where he is involved in applied research on future edge autonomous intelligent systems and edge AI, wireless sensing devices and networks, smart systems integration, microelectronics design of integrated systems (analogue and mixed signal), IIoT. He holds a PhD in Microelectronics and a Master of International Business (MIB). His applied research activities focus on advancing edge AI processing, embedded electronics, wireless and smart sensing technologies, and the convergence of these technologies in different industrial sectors.
Presentation A01_1 - Name Presentert, Company Affiliation, Country
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Presentation A01_3 - Name Presentert, Company Affiliation, Country
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| Networking Lunch |
Parallel Session C01: Title - Room C01
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Presentation C01_1 - Name Presentert, Company Affiliation, Country
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Presentation C01_2 - Name Presentert, Company Affiliation, Country
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Presentation C01_3 - Name Presentert, Company Affiliation, Country
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Presentation C01_4 - Name Presentert, Company Affiliation, Country
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| Afternoon Coffee/Tea Break |
Parallel Session E01: Title - Room E01
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Presentation E01_1 - Name Presentert, Company Affiliation, Country
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Presentation E01_2 - Name Presentert, Company Affiliation, Country
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Presentation E01_3 - Name Presentert, Company Affiliation, Country
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Presentation E01_4 - Name Presentert, Company Affiliation, Country
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| End |
| Dinner |
Parallel Session B01: Title - Room B01
Architecting Edge AI Workflows for Predictive Maintenance in Industrial Applications
This presentation highlights on the importance of properly architecting the AI workflows for the design, development, and deployment of predictive maintenance applications in industrial applications at the edge. It is advocated that the selection of the frameworks/platforms employed for the task largely depend on the application, IIoT devices and their physical operating environments, rather than on the available knowledge and experience of the people, as suggested in similar literature. For this purpose, it was employed several existing AI frameworks and inference engines, that permit end-to-end solutions with various degree of automation and integration with Arm® Cortex®-M-based MCUs. The presentation addresses the verification and validation aspects of model design, development, and deployment of AI-based industrial applications and provides quantitative and qualitative insights that can ultimately allow the use of the right framework. The use case presented is a classification for predictive maintenance based on the vibration of generic rotating equipment (such as motors with vibration pumps, fans, compressors), common to many industrial applications, such as manufacturing.
Speaker
Ovidiu Vermesan (SINTEF, Norway)
Ovidiu Vermesan is Chief Scientist at SINTEF Digital, Oslo, where he is involved in applied research on future edge autonomous intelligent systems and edge AI, wireless sensing devices and networks, smart systems integration, microelectronics design of integrated systems (analogue and mixed signal), IIoT. He holds a PhD in Microelectronics and a Master of International Business (MIB). His applied research activities focus on advancing edge AI processing, embedded electronics, wireless and smart sensing technologies, and the convergence of these technologies in different industrial sectors.
Presentation B01_1 - Name Presentert, Company Affiliation, Country
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Presentation B01_2 - Name Presentert, Company Affiliation, Country
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Presentation B01_3 - Name Presentert, Company Affiliation, Country
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Presentation B01_4 - Name Presentert, Company Affiliation, Country
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Parallel Session D01: Title - Room D01
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Presentation D01_1 - Name Presentert, Company Affiliation, Country
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Presentation D01_2 - Name Presentert, Company Affiliation, Country
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Presentation D01_3 - Name Presentert, Company Affiliation, Country
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Presentation D01_4 - Name Presentert, Company Affiliation, Country
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Parallel Session F01: Title - Room F01
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Performance models and energy-optimal scheduling of DNNs on many-core hardware with dynamic power management
Bernhard Vogginger, Florian Kelber, Shambhavi Balamuthu Sampath, Johannes Partzsch, Christian Mayr
13.10.2022
Workshop on Compilers, Deployment, and Tooling for Edge AI
Performance models and energy-optimal scheduling of DNNs on many-core hardware with dynamic power management
Bernhard Vogginger, Florian Kelber, Shambhavi Balamuthu Sampath, Johannes Partzsch, Christian Mayr
13.10.2022
Workshop on Compilers, Deployment, and Tooling for Edge AI
Performance models and energy-optimal scheduling of DNNs on many-core hardware with dynamic power management
Bernhard Vogginger, Florian Kelber, Shambhavi Balamuthu Sampath, Johannes Partzsch, Christian Mayr
13.10.2022
Workshop on Compilers, Deployment, and Tooling for Edge AI
Performance models and energy-optimal scheduling of DNNs on many-core hardware with dynamic power management
Bernhard Vogginger, Florian Kelber, Shambhavi Balamuthu Sampath, Johannes Partzsch, Christian Mayr
13.10.2022
Workshop on Compilers, Deployment, and Tooling for Edge AI
Performance models and energy-optimal scheduling of DNNs on many-core hardware with dynamic power management
Bernhard Vogginger, Florian Kelber, Shambhavi Balamuthu Sampath, Johannes Partzsch, Christian Mayr
13.10.2022
Workshop on Compilers, Deployment, and Tooling for Edge AI
Performance models and energy-optimal scheduling of DNNs on many-core hardware with dynamic power management
Bernhard Vogginger, Florian Kelber, Shambhavi Balamuthu Sampath, Johannes Partzsch, Christian Mayr
13.10.2022
Workshop on Compilers, Deployment, and Tooling for Edge AI
Performance models and energy-optimal scheduling of DNNs on many-core hardware with dynamic power management
Bernhard Vogginger, Florian Kelber, Shambhavi Balamuthu Sampath, Johannes Partzsch, Christian Mayr
13.10.2022
Workshop on Compilers, Deployment, and Tooling for Edge AI
Performance models and energy-optimal scheduling of DNNs on many-core hardware with dynamic power management
Bernhard Vogginger, Florian Kelber, Shambhavi Balamuthu Sampath, Johannes Partzsch, Christian Mayr
13.10.2022
Workshop on Compilers, Deployment, and Tooling for Edge AI
Performance models and energy-optimal scheduling of DNNs on many-core hardware with dynamic power management
Bernhard Vogginger, Florian Kelber, Shambhavi Balamuthu Sampath, Johannes Partzsch, Christian Mayr
13.10.2022
Workshop on Compilers, Deployment, and Tooling for Edge AI
8:30-9:00
Welcome and Registration
9:00-10:30
Plenary Session I: Edge AI Technology Advancements
9:00-9:30
Keynote presentation I_1
9:30-10:00
Keynote presentation I_2
10:00-10:30
Projects Pitch Presentations
10:30-11:00
Morning Coffee/Tea Break
11:00-17:00
Parallel Sessions
11:00-12:30
Session A01: Edge AI Tools and Methods.
Session Co-chairs:
Fabian Chersi, CEA-List, France, Frédéric Pétrot, Univ. Grenoble Alpes, France
This session is dedicated to the presentation of tools and methods aimed at simplifying and accelerating the design flow, from application development to deployment, from neural network exploration, learning, quantizing, testing, to the generation of optimized hardware-aware code and deployment on edge devices constrained by power consumption or dissipation, latency, form factor and/or cost criteria.
Keywords: edge devices, quantization, pruning, NN optimization, NN deployment, tools for edge devices.
Session B01: Edge AI Machine Vision.
Session Co-chairs:
Alain Pagani, DFKI, Germany, Sadique Sheik, SynSense AI, Switzerland
The session covers presentation addressing edge AI machine vision technology and applications developments based on different algorithms and techniques. The presenters focus on the optimisation techniques and AI accelerators capable of processing inference at minimal power consumption. The implementations include ML algorithms and neural networks used in machine vision tasks optimises for edge devices with constrained resources.
Keywords: edge AI, machine vision, machine learning, deep learning, image signal processors, convolutional neural networks.
11:00-11:20
Presentation: A01_1: Optimization and Compression of Computer Vision and Generative AI Models for Neuromorphic Accelerators.
Tim Llewellynn, Bonseyes Community Association, Switzerland.
In many AI applications, models typically demand extensive training datasets and benchmark data for robust performance. However, gathering such vast and diverse datasets can be especially challenging in edge computing environments. This presentation addresses this critical challenge by showcasing how Generative AI and Computer Vision foundational models can help mitigate the burden by generating synthetic data and benchmarks that closely resemble real-world scenarios. Applicability to Neuromorphic model development will be discussed and AI development in edge computing, where data scarcity is a common constraint.
Speaker: Tim Llewellynn, Bonseyes Community Association, Switzerland.
Tim Llewellynn is President of the Bonseyes Community Association and has 20 years in high-tech startups and corporate R&D in data-driven software development for cloud, mobile and edge computing applications. At Bonseyes Community Association (BCA), is a non-profit AI-focused association, he drives the democratization of artificial intelligence for the benefit of all society, ensuring that AI, from narrow to general, creates highly autonomous systems that benefit everyone, not just a select few. Tim received his B.E. and M.E. (Hons) degrees in Electrical Engineering from the University of Canterbury, New Zealand in 1999, and 2001.
Presentation: B01_1: Image Signal Processor (ISP)
Tunning Machine Learning (ML) methods.
Sepehr Bijani, NXP Semiconductors, Munich, Germany
Image Signal Processor (ISP) is responsible for improving camera signal quality and producing a high-quality image. ISP has a vast number of parameters which should be tunned based on both camera sensor and the environment which camera is operating. Sensor related ISP parameters should be tunned offline for each camera sensor. Parameters related to environment such as white balancing gains should be fine-tuned in the field during the runtime. The offline phase is cumbersome and costly. At the same time, the runtime for fine-tuning should be fast and accurate. Therefore, the Tuner needs to achieve two goals: a) tune the sensor related parameters automatically in lab and b) create a data set for different scenario in lab and train a Machine Learning (ML) runtime for fine-tunning ISP in the field. We first create a solver for finding static camera related parameters. Then, we create the dataset of camera scenes and optimal ISP parameters found by the same solver for each scene for training runtime ML model. The trained ML model will inference optimal ISP parameters for the scene in the field.
Speaker: Sepehr Bijani, NXP Semiconductors, Munich, Germany.
Sepehr is SW engineer working for NXP Germany. His main research topic is AI/ML in image processing applications. His professional carrier focuses on embedded SW engineering.
11:20-11:40
Presentation: A01_2: Shrinking Embedded Machine Learning Applications: FMCW Radar Gesture Sensing on Cortex-M0+ under 10KB and 10mW.
Jonas Daugalas, Infineon Technologies AG, Germany
AI-enabled millimeter-wave radar sensors are becoming increasingly popular solutions for human-machine interaction tasks. However, due to compute and memory requirements, signal processing and machine learning approaches pose challenges for deploying such solutions to low-cost and low-power edge devices. In this work we demonstrate signal processing optimization techniques and neural network inference engine trade-offs that allow us to deploy a 60GHz FMCW radar-based gesture recognition solution on an Infineon PSoC™ 4 microcontroller equipped with an Arm® Cortex-M0+ processor. Our proposed system robustly recognizes five distinct hand gestures, requires less than 10 milliwatts of power, 9.7KB of RAM, 107KB of EPROM, 73% of processor time, and with microTVM, among other three evaluated inference engines, achieves the best trade-off between manual effort and in-field performance.
Speaker: Jonas Daugalas, Infineon Technologies AG, Germany.
Jonas Daugalas has a background in Computer Science, bachelor’s degree in CS from Vilnius University and master’s degree in CS from Technical University of Munich. Software engineering experience in the fields of particle physics, computer-aided design, physical simulation, machine learning and digital signal processing.
Jianyu Zhao has background in Electrical and Information Engineering: received a B. Eng. from Tianjin University in 2015 and a M. Sc. from Technical University of Munich in 2018. Work experience on algorithm design and deployment for smart sensing technologies at Infineon Technologies AG since 2018. Current research interest: neural network embedding on edge devices.
Presentation: B01_2: Ultra-low Power Car Plate Recognition at the Edge.
Dávid Isztl, Institute of Embedded Systems (InES), ZHAW School of Engineering, Switzerland.
So far, only a few edge devices include AI accelerators that are capable of processing inference at minimal power consumption. As an example, the MAX78002 provides a 2Mbytes CNN engine and an Arm Cortex-M4 with 384KB of SRAM. On one hand, the device can work battery-powered for up to 3 years. On the other hand, severe compromises and complex procedures are necessary to adapt AI networks for specific applications. Using license plate recognition as an example, the talk will show how the shortcomings of the small memory footprint and low image resolution offered by the AI accelerator can be overcome.
Speaker: Dávid Isztl, Institute of Embedded Systems (InES), ZHAW School of Engineering, Switzerland.
Dávid Isztl is a research assistant at the Institute of Embedded Systems at ZHAW. Currently, his research is focused on high-performance embedded platforms, including AI accelerators and Nvidia NX/AGX platforms. Currently, he is focusing on low-power AI processing on the edge.
11:40-12:00
Presentation: A01_3: Aidge: A New Framework for Deep Neural Network development, Training, and Deployment on the Edge.
Fabian Chersi. CEA-List, FRANCE
Aidge is a comprehensive framework for fast and accurate Deep Neural Network (DNN) building, training, testing and deployment. The platform integrates tools for database construction, data pre-processing, network building, benchmarking, and hardware export to various targets. It is particularly useful for DNN design and exploration, allowing simple and fast prototyping of DNN with different topologies. Export hardware targets include CPU, DSP, and GPU as well as custom hardware code generation with High-Level Synthesis for FPGA and dedicated configurable DNN accelerator IP.
Speaker:Fabian Chersi. CEA-List, FRANCE.
Dr. Fabian Chersi has a BSC and a Master in Electronic Physics, and a PhD in Computational Neuroscience and Robotics. After his studies, he initially did a postdoc at the Institute for Neuroinformatics in Zurich and at UCL in London, then he moved to Paris where he worked in private companies on the development of neuromorphic algorithms and ASICs for deep neural networks. He currently works at the Alternative Energies Commission (CEA) in Paris as a senior AI architect on low power AI chips for the edge.
Presentation: B01_3: Designing Lightweight CNN for Images: Architectural Components and Techniques.
Lilian Hollard, Université de Reims Champagne-Ardenne, France
While neural networks have brought about impressive advancements in computer vision tasks, these achievements heavily depend on computationally demanding resources, restricting their deployment. The presentation unveils the landscape of deep learning architecture optimization tailored for mobile and Edge devices.
Speaker: Lilian Hollard, Université de Reims Champagne-Ardenne, France.
First year Ph.D. student at LICIIS from the University of Reims Champagne Ardenne, development of Artificial Intelligence models for viticulture: Disease identification and yield estimation. Adaptation and optimization of Deep Learning models for Edge and mobile devices.
12:00-12:20
Presentation: A01_4: A Low Power And High-Performance Software Approach to Artificial Intelligence On-Board.
Pablo Ghiglino, Klepsydra Technologies, Switzerland.
Future spacecraft require increased autonomy, more sensors, and better processing power for space exploration, Earth Observation, and robotics. These advancements bring challenges like low determinism, high power consumption, data losses, and response delays. This article presents a novel approach to on-board artificial intelligence (AI) using data pipeline and parallelization techniques to enhance deep neural networks (DNN) in space applications. The results show significantly improved data processing speed and power efficiency, enabling practical AI in space.
Speaker:Pablo Ghiglino, Klepsydra Technologies, Switzerland.
Dr Pablo Ghiglino, Klepsydra founder and CEO. Over 10 years of experience in the finance industry, regarded as a highly skilled software developer. Parallel to his work in finance, Pablo successfully studied for a PhD at the Surrey Space Center in Aerospace Engineering in the field of “High Precision Planetary Landing”. After his studies, he got involved in several aerospace projects, where he seized the opportunity and created Klepsydra to respond to the needs for cutting edge computing by implementing successful software techniques from the highly competitive financial sector in embedded software frameworks for its use in other industries.
Presentation: B01_4: Upstream Mask Tuning of the Plain Vision Transformer for Domain Generalization on Downstream Segmentation Tasks.
Tommie Kerssies, Eindhoven Technical Univerity, the Netherlands.
Deploying perception models on edge devices requires robustness to real-world distribution shifts. We reveal that a fine-tuned plain vision transformer excels in out-of-distribution generalization but is hindered by single-scale features and image-level, as opposed to pixel-level, pretraining. To mitigate this, we employ a mask-tuning step on a large, high-resolution dataset consisting solely of masks, guided by a frozen teacher for semantic context. Our work aims to redirect the domain generalization field towards optimizing pretraining rather than complicating fine-tuning.
Speaker: Tommie Kerssies, Eindhoven Technical Univerity, the Netherlands.
Tommie Kerssies is a PhD candidate in the Mobile Perception Systems Lab at Eindhoven University of Technology, under the guidance of Gijs Dubbelman. Specializing in the generalization capabilities of foundation models, Tommie brings a strong academic background with a master’s in data science and a bachelor’s in computer science.
12:30-13:30
Networking Lunch
13:30-15:30
Session C01: RISC-V-based Edge AI Hardware Acceleration.
Session Co-chairs:
Konstantinos Georgopoulos, Iakovos Mavroidis, Technical University of Crete, Greece
RISC-V-based edge devices are rapidly expanding their scope and application range. They are efficient in executing a variety of AI algorithms close to the application environment, ensuring energy efficiency while maintaining high performance. Furthermore, the open-source architecture of RISC-V enables researchers to customize and enhance it, incorporating low-power AI and security accelerators tailored to the specific needs of edge applications. This session will focus on RISC-V-based edge architectures and their diverse applications.”
Keywords: RISC-V, hardware accelerator, reconfigurable hardware, AI accelerator, HW/SW co-design, energy consumption, HW-based security, ΙοΤ.
Session D01: Edge AI Accelerators Architectures.
Session Co-chairs:
Mario Diaz Nava, STMicroelectronics, France, María Loreto Mateu Sáez, Fraunhofer/IIS, Germany.
Efficient Edge AI system solutions (with highly energy efficient, low latency and high integration) require new HW Processors that support AI advanced features based on neuromorphic architectures implemented in different embedded non-volatile memory and SRAM technologies. This session presents a selection of different AI accelerators capable of addressing different areas of Edge applications. These hardware processors are essential for optimal Edge solutions, but a trade-off between cost and technological features is necessary.
Keywords: HW accelerators, eNVM, FPGA, architecture, neural networks, edge IoT devices, framework, toolchain, dataflow, flexibility, scalability.
13:30-13:50
Presentation: C01_1: How to Accelerate Your Application on RISC-V Using a Coprocessor Interface.
Dr. Christian Herber, NXP, Germany.
RISC-V is becoming the most popular ISA for advanced applications like AI due to its modularity and customizability. However, customization comes with several downsides, like ecosystem fragmentation and design complexity. A clearly defined coprocessor interface can reduce design efforts and improve interoperability. This presentation outlines the use-cases and challenges in a coprocessor interface based on concrete interface definitions.
Speaker: Dr. Christian Herber, NXP, Germany.
Christian Herber the European Principal RISC-V Architect at NXP. Based in Hamburg, his work focuses on innovation management and advanced IP for RISC-V processors in Europe. He has a background in automotive processing, networking, and software. He holds a PhD in Electrical Engineering and an M.Sc. in Electrical Engineering and Information Technology, all from Technical University of Munich, Germany.
Presentation: D01_1: Efficient Mapping of Neural Networks on FPGA With Generated VHDL code.
Thierry Delafontaine, Institute of Embedded Systems (InES), ZHAW School of Engineering, Switzerland.
FPGAs are an ideal platform to accelerate AI processing at the edge. However, straightforward toolchains to deploy AI accelerators without in-depth knowledge of FPGA programming are lacking. We present a framework that allows the design of custom AI accelerators for FPGAs by generating application specific VHDL code. The framework proposes a dataflow-style hardware mapping that is specific to the NN and optimally uses the available resources. We focused on providing an easy-to-use interface for users and an expandable core that allows developers to add custom operators, optimizers, objectives, metrics, and callbacks.
Speaker: Thierry Delafontaine, Institute of Embedded Systems (InES), ZHAW School of Engineering, Switzerland.
Thierry Delafontaine is a researcher at the Institute of Embedded Systems at the University of Applied Sciences in Zürich. His research topics include embedded AI and accelerating Neural Networks on embedded devices. Currently, he is building the iAIa framework, that he presents at the EEAI conference.
13:50-14:10
Presentation: C01_2: The Beauty of RISC-V Customization for Edge AI HW Acceleration.
Arturo Prieto, Lund University, Sweden.
Edge AI is becoming an increasingly popular topic due to the continuous development of AI applications avoiding the dependencies on-the-cloud. The use of sensitive data or latency constraints push for processing on edge devices. Battery-limited and area-constrained devices offer the opportunity for hardware designers to find efficient architecture solutions. In this presentation, a RISC-V platform is presented as the conductor for the customized integration of hardware accelerators.
Speaker: Arturo Prieto, Lund University, Sweden.
Arturo Prieto received his B. Sc. degree in Electronics Engineering in 2017 from the Polytechnic University of Valencia, Spain, and the M. Sc. degree in Electronic Design in 2019 from Lund University, Sweden. He is currently a PhD student in the Digital ASIC group at the department of Electrical and Information Technology (EIT), Lund University. His doctoral studies focus on beyond-von Neumann architectures for edge computing.
Presentation: D01_2: A Scalable and Flexible Interconnect-based Dataflow Architecture for Edge AI Inference.
Hana KRICHENE. CEA-List, France.
The scalable approach of edge AI inference has increased its computational complexity due to the involvement of multiple properties. This work proposes an interconnect-based dataflow architecture based on many Processing Elements to overcome such problems. The proposed architecture can efficiently handle different convolutions featuring different shapes of input image/feature maps and filters, with data reuse and communication-computation overlap. It is scalable and configurable to adapt to different CNN layers.
Speaker: Hana KRICHENE. CEA-List, France.
Dr. Hana Krichene obtained her Ph.D. Degree in Computer Science in 2015 from the University of Lille. She joined CEA LIST (Saclay, France) in 2017 to participate in the development of the Future E/E Architecture for Automotive Computing Environment. Since 2020, she conducts study research on NoC optimized for AI hardware accelerators of future systems used by the industrial partners of the project. Her current research focuses on developing an advanced dataflow architecture and an environment for mapping and estimating the cost of running a DNN application on a given dataflow architecture.
14:10-14:30
Presentation: C01_3: Heterogeneous SoA Processing on the Edge.
Yannis Papaefstathiou, Aristotle University of Thessaloniki, Greece.
The REBECCA project is developing efficient edge-AI systems that can overcome physical limitations of edge devices and meet regulations and constraints in numerous distinct application domains. This involves designing and developing hardware, software, and middleware that can accelerate computation-intensive parts of both AI and conventional applications, ensure deterministic response times, and satisfy safety constraints. The project is working towards enhancing European strategic autonomy and sovereignty by using an open, royalty-free CPU architecture (i.e., RISC-V), and address performance safety and security concerns associated with IoT and edge devices.
Speaker: Yannis Papaefstathiou, Aristotle University of Thessaloniki, Greece.
Yannis Papaefstathiou is a Professor at ECE School and Aristotle University of Thessaloniki and a co-founder and CEO of Exascale Performance Systems (EXAPSYS). His main research interests are in the design and implementation methodologies for CPS with tightly coupled design parameters and highly constrained resources as well as in heterogeneous High-Performance Computing (HPC) systems and the associated programming/development tools. He was granted a PhD in computer science at the University of Cambridge in 2001, an M.Sc. from Harvard University in 1997 and a B.Sc. from the University of Crete in 1996. He has published more than 100 papers in IEEE and ACM-sponsored journals and conferences. He has participated in more than 15 competitively funded research projects in Europe with a cumulative budget share of more than €9 million.
Presentation: D01_3: DeepEdgeSoC: End-to-end Deep Learning Framework for Edge IoT Devices.
Mhd Rashed Al Koutayni, DFKI Kaiserslautern, Germany.
In the IoT domain, FPGAs are considered a powerful alternative to general purpose graphics processing units (GPGPUs) since their flexible architecture can run the DNNs with much less energy. The enormous amount of effort and time required for the entire end-to-end edge-aware deployment urged us to develop DeepEdgeSoc, an integrated framework for DL design and acceleration. DeepEdgeSoc is an overarching framework under which DNNs can be built. DeepGUI, a visual drag-and-drop DNN design environment, plays an important role in accelerating the network design phase. In DeepEdgeSoc, the networks can be quantized and compressed to suite the underlying edge devices in terms of size and energy.
Speaker: Mhd Rashed Al Koutayni, DFKI Kaiserslautern, Germany.
After receiving his master degree in Embedded Computing Systems at the Technical University of Kaiserlslautern-Landau (RPTU), Mr. Mhd Rashed Al Koutayni joined the Augmented Vision department of the German Research Center for Artificial Intelligence (DFKI) in Kaiserslautern (Germany) as a scientific researcher while pursuing at the RPTU university as a PhD student. His main research focus is FPGA-Based Hardware Acceleration of Deep Neural Networks for Computer Vision.
14:30-14:50
Presentation: C01_4: Why Running Kubernetes on RISC-V is Important for AI Applications.
Antony Chazapis, FORTH, Greece.
Kubernetes is the leading open-source container orchestration platform, widely adopted for easily developing and running scalable applications from the Cloud to the Edge. And now, through K3s (a CNCF-certified distribution), one can also run Kubernetes on devices with processors that use the open RISC-V instruction set. In this talk we will present the process of supporting the new architecture and discuss the prospects this brings for AI applications in future Edge platforms.
Speaker: Antony Chazapis, FORTH, Greece.
Antony Chazapis is a postdoctoral researcher at the CARV Lab of FORTH-ICS. He works on distributed, large-scale platforms for both compute and storage that span the whole computing continuum, from the Cloud to the Edge. His experience and interests include acceleration technologies for Machine Learning/AI in both HPC and the Cloud, Cloud-native software architectures, bridging Cloud with HPC, as well as DevOps and MLOps practices.
Presentation: D01_4: A FeFET-based Non-Volatile Memory and AI Accelerator Macro.
Marko Noack, Ferroelectric Memory GmbH, Germany.
The presentation focuses on the design of a highly configurable AI accelerator macro for convolutional neural networks using ferroelectric NVM as weight storage and which serves as a building block for edge AI systems. We furthermore present a test setup in which the digital part of the circuit was implemented on an FPGA using weights stored on a separate FeFET NVM chip to demonstrate image processing tasks.
Speaker: Marko Noack, Ferroelectric Memory GmbH, Germany.
Marko Noack received the M.Sc. degree in electrical engineering from Technische Universität Dresden, Germany in 2011. He was working on VLSI implementations of neuromorphic circuits before he co-founded the Ferroelectric Memory GmbH (FMC) in 2016, where he is currently Member of Technical Staff and project leader. He works on non-volatile memory circuit designs based on ferroelectrics.
15:00-15:30
Afetrnoon Coffee/Tea Break
15:30-17:00
Session E01: Trustworthy Edge AI.
Session Co-chairs:
Patrick Pype, NXP Semiconductors, Belgium, Kay Bierzynski, Infineon Technologies AG, Germany.
Trustworthy edge AI addresses the development and deployment of AI systems at the edge of a network with a focus on ensuring system dependability e.g., reliability, security, privacy, and ethical behaviour among other properties. Ensuring trustworthiness in edge AI-based systems requires a multidisciplinary approach that combines expertise in electronics, sensing, IoT, AI, cybersecurity, privacy, ethics, and regulatory compliance. The session addresses the concepts for edge AI trustworthiness and the challenges for developing and deploying edge AI trustworthy systems.
Keywords: explainable edge AI, interpretable edge AI, transparency, edge AI bias mitigation, consent mechanisms, anonymisation, adverbial defence, accountability, verification, validation and testing.
Session F01: Optimisation Methods and Techniques for Neural Networks.
Session Co-chairs:
Gerardo Daalderop, NXP Semiconductors, the Netherlands, Alberto Faro, DEEPSENSING SRL, Italy.
Optimisation methods and techniques for neural networks depend on the specific problem, architecture, and available AI-based HW resources. Experimentation and tuning are required to find the optimal combination for a given neural network task. The session covers various optimisation methods and techniques used in training neural networks to find the set of model parameters that minimise a predefined loss functions.
Keywords: Bayesian neural networks, pruning techniques, energy, size, accuracy, hierarchical-controlling system, neural network processing.
15:30-15:50
Presentation: E01_1: Efficient AI-based Attack Detection Methods for Sensitive Edge Devices and Systems.
Celine Thermann, University of Lübeck, Germany.
Sensitive data is stored on an increasingly large number of edge devices, representing a lucrative target for attackers. Hardware and performance overhead, as well as environmental stresses, play a crucial role in the selection of appropriate solutions. In this research contribution, we are examining the requirements for Artificial intelligence (AI)-based mechanisms and the sensing capabilities of state-of-the-art secure devices.
Speaker: Celine Thermann, University of Lübeck, Germany.
Celine Thermann is a research assistant at the Institute of Computer Engineering at the University of Lübeck, Germany. She received both a Bachelor and Master degree in 2020 and 2022 in IT-Security from the University of Lübeck, respectively. Her main research interest is deep learning and embedded system security, and she focuses on the trustworthiness of AI accelerators.
Presentation: F01_1: Memristor Based Bayesian IMC.
Tifenn HIRTZLIN, CEA-LETI, France.
This presentation examines three methods employing resistive memory’s natural randomness for Bayesian near-memory and in-memory computing. The approaches encompass Bayesian machines optimized for near-memory computing, Bayesian neural networks that capitalize on synaptic randomness, and Bayesian learning using the Metropolis-Hastings Markov Chain Monte Carlo technique. These techniques yield competitive accuracy compared to traditional software methods while enabling decision uncertainty assessment.
Speaker: Tifenn HIRTZLIN, CEA-LETI, France.
Tifenn HIRTZLIN earned a Ph.D. in Nanosciences and Electrical Engineering from the University of Paris-Saclay, France, in 2020, and is currently a Research Engineer at CEA Leti. He is at the forefront of designing intelligent memories for the Internet of Things (IoT), drawing inspiration from bio-inspired concepts such as the Bayesian approach to brain function. Tifenn’s primary responsibility involves designing electrical circuits for application-specific integrated circuits (ASICs) that exploit non-volatile memory devices, and evaluating their performance, contributing significantly to the advancement of IoT technology.
15:50-16:10
Presentation: E01_2: Explainability and Interpretability Concepts for Edge AI Systems.
Angelo Genovese, Università degli Studi di Milano, Italy.
The presentation gives an overview of the recent techniques for AI explainability and interpretability, with a specific focus on Edge computing. The presentation will discuss the motivations for explainability and interpretability, a taxonomy of the latest methodologies, the most common benchmarking approaches, as well as challenges, open issues, and research trends.
Speaker: Angelo Genovese, Università degli Studi di Milano, Italy.
Angelo Genovese received the Ph.D. degree in computer Science from the Università degli Studi di Milano, Italy, in 2014. He has been an Associate Professor in Computer Science with the Università degli Studi di Milano since 2022. He has been a Visiting Researcher with the University of Toronto, Toronto, ON, Canada. Original results have been published in over 60 papers in international journals, proceedings of international conferences, books, and book chapters. His current research interests include signal and image processing, artificial intelligence, industrial and environmental monitoring systems.
Presentation: F01_2: Trade-Off Analysis of Pruning Methods for Compact Neural Networks on Embedded Devices.
Duc V Le, University of Twente, The Netherlands.
Pruning of neural networks is a technique often used to reduce the size of a machine learning model, as well as to reduce the computation cost for model inference. This study analyses four pruning techniques for efficient reduction of machine learning model size, based on compression-accuracy balance. Evaluation includes impact on energy use during inference on a Raspberry Pi 4B using MobileNetV2. We examine trade-offs among energy, size, and accuracy, aiding engineers in selecting optimal pruning for embedded ML models. The research is expected to provide engineers with a reference providing guidance upon deciding what pruning technique to use for a machine learning model to be deployed on an embedded device.
Speaker: Duc V Le, University of Twente, The Netherlands.
Dr. Le Viet Duc is Assistant Professor at the Department of Computer Science at the University of Twente. Inspired by the way the human brain learns the world, he is eager to develop sustainable AI models for that is robust to change in data distribution caused by new environments, bridging the gap between lab and word. His focus is on finding efficient methods to learn, transfer and distil knowledge hidden in different datasets, especially unlabelled ones. As he has 10 years R&D experience in developing smart and wearable and industrial devices, he is also interested in applying his research to industrial products for a sustainable world.
16:10-16:30
Presentation: E01_3: Approximate Computing in a Federated Learning Context: Gains Beyond Energy.
Ihsen Alouani, Université Polytechnique Hauts-De-France, France.
In energy-constrained systems at the edge, the adoption of federated learning has garnered significant attention due to its dual capacity to address privacy concerns while achieving accurate model training without resource-intensive methodologies. The Approximate Computing paradigm, characterized by leveraging controlled imprecision to achieve computational efficiency, has emerged as one of the solutions towards a trade-off between performance and energy consumption in fault-tolerant applications. Expanding on these foundational concepts, the presentation proposes an innovative approach, i.e., “Approximate Federated Learning.” Within this framework, nodes collaboratively undertake training and inference procedures utilizing approximate computing techniques, thereby accentuating energy efficiency gains. The study extends the benefits beyond energy conservation, highlighting substantial security enhancements achievable within this amalgamation. This holistic framework advances energy optimization in edge scenarios and bolsters the overall security and trustworthiness of edge AI systems.
Speaker: Ihsen Alouani, Université Polytechnique Hauts-De-France, France.
Ihsen Alouani received his master’s degree from the National Engineering School of Sousse, Tunisia, and his Ph.D. in 2016 from the Université Polytechnique Hauts-de-France. After his PhD, he was a Postdoc at Technical University of Munich, Germany followed by an Associate Professor at IEMN Laboratory (CNRS-8520), Université Polytechnique Hauts-de-France in 2018. He served as Guest Editor for several journals including Microprocessors & Microsystems and is a member of the Program Committee of several international conferences including Design Automation Conference (DAC) as well as Asia and South Pacific Design Automation Conference (ASP-DAC). His research interest includes machine learning security and privacy, Approximate Computing, and Embedded Systems reliability and security.
Presentation: F01_3: SENECA: Flexible and Scalable Neuromorphic Processor for Efficient Event-driven Neural Processing.
Guangzhi Tang, imec, the Netherlands.
The lack of flexibility in most neuromorphic architecture designs results in significant performance loss and inefficient memory usage when mapping various neural network algorithms. We present SENECA, a digital neuromorphic architecture that balances the trade-offs between flexibility and efficiency using a hierarchical-controlling system. A SENECA core contains two controllers, a flexible RISC-V-based controller, and an optimized controller (Loop Buffer). This flexible computational pipeline allows for deploying efficient mapping for various neural networks, on-device learning, and pre-post processing algorithms. The hierarchical-controlling system introduced in SENECA makes it one of the most efficient neuromorphic processors for event-driven neural network processing.
Speaker: Guangzhi Tang, imec, the Netherlands.
Guangzhi Tang is a researcher at imec based in Eindhoven, the Netherlands. His research focuses on neuromorphic computing, hardware-aware neural networks, and robotics. He has extensive experience working in the field of neuromorphic computing to explore the real-world advantages of digital neuromorphic architectures. He received his Ph.D. and M.Sc. degrees in Computer Science from Rutgers, the State University of New Jersey in the United States, and his B.Sc. degree in Computer Science from Nanjing University in China.
16:30-16:50
Presentation: E01_4: Shaping Edge AI That Flows With Humans: Designing Trustworthy and Useful AI Applications.
Peter Moertl, Virtual Vehicle Research GmbH, Austria.
The introduction of artificial intelligence solutions in industrial work processes leads in most cases to changes in human tasks and responsibilities rather than complete autonomous operations. However, technology-centered AI introductions that are currently still common, frequently overlook the role of the human operator and the involved organizations, resulting in significant AI effectiveness reductions and even social backlashes, slowing down progress, AI uptake, and real benefit-accrual. In the InSecTT project we have investigated various use cases for AI applications in different domains including medical, transportation, IT, and manufacturing and have formulated a framework for successful AI introductions that centers around human oversight. In this presentation we will present this framework and give examples for its application in multiple domains.
Speaker: Peter Moertl, Virtual Vehicle Research GmbH, Austria.
Dr Peter Mörtl is the manager of the human the factors teams at Virtual Vehicle Research center in Graz, Austria. His focus is on preparing and facilitating human and system integration for technological developments in automotive and AI applications, specifically focusing trust, user modeling, and user acceptance by applying human factors and systems engineering. Previously he has worked as systems engineer and human factors researcher in aviation projects in the United States to develop flight-deck and air traffic control applications. He is also Lector for Human-Systems Integration at the University of Graz, Austria.
Presentation: F01_4: Energy Efficient Deep-Edge Computing through Hardware Machine Learning.
Marcello Coppola, ST Microelectronics, France.
It is currently challenging to accomplish high data processing with low latency, because large-scale, persistent, high-bandwidth connection is often required to gather huge volumes of data from platforms and sensors operating at the edge to allow processing in the cloud. Internet-of-Things (IoT) devices deployment in remote locations for environmental monitoring with machine learning (ML) techniques, Internet-of-Medical Things, IoT-based precision agriculture, all can operate with limited battery, while robustness and reliability is required.
Speaker: Marcello Coppola, ST Microelectronics, France.
Marcello Coppola is a Technical Director at STMicroelectronics, in charge of the implementation of several research projects, including overseeing day-to-day field-based activities related to System-On-Chip Consumer Space, Automotive, IoT, Healthcare, with particular emphasis on Network-on-Chip, heterogenous multi-core hardware and software architectures which include CPU, GPU and accelerators.
17:00
End
20:00
Dinner
Parallel Session A01: Title - Room A01
Architecting Edge AI Workflows for Predictive Maintenance in Industrial Applications
This presentation highlights on the importance of properly architecting the AI workflows for the design, development, and deployment of predictive maintenance applications in industrial applications at the edge. It is advocated that the selection of the frameworks/platforms employed for the task largely depend on the application, IIoT devices and their physical operating environments, rather than on the available knowledge and experience of the people, as suggested in similar literature. For this purpose, it was employed several existing AI frameworks and inference engines, that permit end-to-end solutions with various degree of automation and integration with Arm® Cortex®-M-based MCUs. The presentation addresses the verification and validation aspects of model design, development, and deployment of AI-based industrial applications and provides quantitative and qualitative insights that can ultimately allow the use of the right framework. The use case presented is a classification for predictive maintenance based on the vibration of generic rotating equipment (such as motors with vibration pumps, fans, compressors), common to many industrial applications, such as manufacturing.
Speaker
Ovidiu Vermesan (SINTEF, Norway)
Ovidiu Vermesan is Chief Scientist at SINTEF Digital, Oslo, where he is involved in applied research on future edge autonomous intelligent systems and edge AI, wireless sensing devices and networks, smart systems integration, microelectronics design of integrated systems (analogue and mixed signal), IIoT. He holds a PhD in Microelectronics and a Master of International Business (MIB). His applied research activities focus on advancing edge AI processing, embedded electronics, wireless and smart sensing technologies, and the convergence of these technologies in different industrial sectors.
Performance models and energy-optimal scheduling of DNNs on many-core hardware with dynamic power management
Bernhard Vogginger, Florian Kelber, Shambhavi Balamuthu Sampath, Johannes Partzsch, Christian Mayr
13.10.2022
Workshop on Compilers, Deployment, and Tooling for Edge AI
Parallel Session A01: Title - Room A01
Architecting Edge AI Workflows for Predictive Maintenance in Industrial Applications
This presentation highlights on the importance of properly architecting the AI workflows for the design, development, and deployment of predictive maintenance applications in industrial applications at the edge. It is advocated that the selection of the frameworks/platforms employed for the task largely depend on the application, IIoT devices and their physical operating environments, rather than on the available knowledge and experience of the people, as suggested in similar literature. For this purpose, it was employed several existing AI frameworks and inference engines, that permit end-to-end solutions with various degree of automation and integration with Arm® Cortex®-M-based MCUs. The presentation addresses the verification and validation aspects of model design, development, and deployment of AI-based industrial applications and provides quantitative and qualitative insights that can ultimately allow the use of the right framework. The use case presented is a classification for predictive maintenance based on the vibration of generic rotating equipment (such as motors with vibration pumps, fans, compressors), common to many industrial applications, such as manufacturing.
Speaker
Ovidiu Vermesan (SINTEF, Norway)
Ovidiu Vermesan is Chief Scientist at SINTEF Digital, Oslo, where he is involved in applied research on future edge autonomous intelligent systems and edge AI, wireless sensing devices and networks, smart systems integration, microelectronics design of integrated systems (analogue and mixed signal), IIoT. He holds a PhD in Microelectronics and a Master of International Business (MIB). His applied research activities focus on advancing edge AI processing, embedded electronics, wireless and smart sensing technologies, and the convergence of these technologies in different industrial sectors.
Performance models and energy-optimal scheduling of DNNs on many-core hardware with dynamic power management
Bernhard Vogginger, Florian Kelber, Shambhavi Balamuthu Sampath, Johannes Partzsch, Christian Mayr
13.10.2022
Workshop on Compilers, Deployment, and Tooling for Edge AI
| 11:00-12:30 |
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| 15:30-16:00 |
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| 20:00 |
Parallel Session A01: Title - Room A01
Architecting Edge AI Workflows for Predictive Maintenance in Industrial Applications
This presentation highlights on the importance of properly architecting the AI workflows for the design, development, and deployment of predictive maintenance applications in industrial applications at the edge. It is advocated that the selection of the frameworks/platforms employed for the task largely depend on the application, IIoT devices and their physical operating environments, rather than on the available knowledge and experience of the people, as suggested in similar literature. For this purpose, it was employed several existing AI frameworks and inference engines, that permit end-to-end solutions with various degree of automation and integration with Arm® Cortex®-M-based MCUs. The presentation addresses the verification and validation aspects of model design, development, and deployment of AI-based industrial applications and provides quantitative and qualitative insights that can ultimately allow the use of the right framework. The use case presented is a classification for predictive maintenance based on the vibration of generic rotating equipment (such as motors with vibration pumps, fans, compressors), common to many industrial applications, such as manufacturing.
Speaker
Ovidiu Vermesan (SINTEF, Norway)
Ovidiu Vermesan is Chief Scientist at SINTEF Digital, Oslo, where he is involved in applied research on future edge autonomous intelligent systems and edge AI, wireless sensing devices and networks, smart systems integration, microelectronics design of integrated systems (analogue and mixed signal), IIoT. He holds a PhD in Microelectronics and a Master of International Business (MIB). His applied research activities focus on advancing edge AI processing, embedded electronics, wireless and smart sensing technologies, and the convergence of these technologies in different industrial sectors.
Presentation A01_1 - Name Presentert, Company Affiliation, Country
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| Networking Lunch |
Parallel Session C01: Title - Room C01
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| Afternoon Coffee/Tea Break |
Parallel Session E01: Title - Room E01
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Presentation E01_4 - Name Presentert, Company Affiliation, Country
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| End |
| Dinner |
Parallel Session B01: Title - Room B01
Architecting Edge AI Workflows for Predictive Maintenance in Industrial Applications
This presentation highlights on the importance of properly architecting the AI workflows for the design, development, and deployment of predictive maintenance applications in industrial applications at the edge. It is advocated that the selection of the frameworks/platforms employed for the task largely depend on the application, IIoT devices and their physical operating environments, rather than on the available knowledge and experience of the people, as suggested in similar literature. For this purpose, it was employed several existing AI frameworks and inference engines, that permit end-to-end solutions with various degree of automation and integration with Arm® Cortex®-M-based MCUs. The presentation addresses the verification and validation aspects of model design, development, and deployment of AI-based industrial applications and provides quantitative and qualitative insights that can ultimately allow the use of the right framework. The use case presented is a classification for predictive maintenance based on the vibration of generic rotating equipment (such as motors with vibration pumps, fans, compressors), common to many industrial applications, such as manufacturing.
Speaker
Ovidiu Vermesan (SINTEF, Norway)
Ovidiu Vermesan is Chief Scientist at SINTEF Digital, Oslo, where he is involved in applied research on future edge autonomous intelligent systems and edge AI, wireless sensing devices and networks, smart systems integration, microelectronics design of integrated systems (analogue and mixed signal), IIoT. He holds a PhD in Microelectronics and a Master of International Business (MIB). His applied research activities focus on advancing edge AI processing, embedded electronics, wireless and smart sensing technologies, and the convergence of these technologies in different industrial sectors.
Presentation B01_1 - Name Presentert, Company Affiliation, Country
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Presentation B01_2 - Name Presentert, Company Affiliation, Country
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Presentation B01_4 - Name Presentert, Company Affiliation, Country
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Parallel Session D01: Title - Room D01
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Presentation D01_1 - Name Presentert, Company Affiliation, Country
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Presentation D01_2 - Name Presentert, Company Affiliation, Country
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Presentation D01_3 - Name Presentert, Company Affiliation, Country
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Presentation D01_4 - Name Presentert, Company Affiliation, Country
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Parallel Session F01: Title - Room F01
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Presentation F01_1 - Name Presentert, Company Affiliation, Country
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Presentation F01_4 - Name Presentert, Company Affiliation, Country
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Performance models and energy-optimal scheduling of DNNs on many-core hardware with dynamic power management
Bernhard Vogginger, Florian Kelber, Shambhavi Balamuthu Sampath, Johannes Partzsch, Christian Mayr
13.10.2022
Workshop on Compilers, Deployment, and Tooling for Edge AI
Performance models and energy-optimal scheduling of DNNs on many-core hardware with dynamic power management
Bernhard Vogginger, Florian Kelber, Shambhavi Balamuthu Sampath, Johannes Partzsch, Christian Mayr
13.10.2022
Workshop on Compilers, Deployment, and Tooling for Edge AI
Performance models and energy-optimal scheduling of DNNs on many-core hardware with dynamic power management
Bernhard Vogginger, Florian Kelber, Shambhavi Balamuthu Sampath, Johannes Partzsch, Christian Mayr
13.10.2022
Workshop on Compilers, Deployment, and Tooling for Edge AI
Performance models and energy-optimal scheduling of DNNs on many-core hardware with dynamic power management
Bernhard Vogginger, Florian Kelber, Shambhavi Balamuthu Sampath, Johannes Partzsch, Christian Mayr
13.10.2022
Workshop on Compilers, Deployment, and Tooling for Edge AI
Performance models and energy-optimal scheduling of DNNs on many-core hardware with dynamic power management
Bernhard Vogginger, Florian Kelber, Shambhavi Balamuthu Sampath, Johannes Partzsch, Christian Mayr
13.10.2022
Workshop on Compilers, Deployment, and Tooling for Edge AI
Performance models and energy-optimal scheduling of DNNs on many-core hardware with dynamic power management
Bernhard Vogginger, Florian Kelber, Shambhavi Balamuthu Sampath, Johannes Partzsch, Christian Mayr
13.10.2022
Workshop on Compilers, Deployment, and Tooling for Edge AI
Performance models and energy-optimal scheduling of DNNs on many-core hardware with dynamic power management
Bernhard Vogginger, Florian Kelber, Shambhavi Balamuthu Sampath, Johannes Partzsch, Christian Mayr
13.10.2022
Workshop on Compilers, Deployment, and Tooling for Edge AI
Performance models and energy-optimal scheduling of DNNs on many-core hardware with dynamic power management
Bernhard Vogginger, Florian Kelber, Shambhavi Balamuthu Sampath, Johannes Partzsch, Christian Mayr
13.10.2022
Workshop on Compilers, Deployment, and Tooling for Edge AI
Performance models and energy-optimal scheduling of DNNs on many-core hardware with dynamic power management
Bernhard Vogginger, Florian Kelber, Shambhavi Balamuthu Sampath, Johannes Partzsch, Christian Mayr
13.10.2022
Workshop on Compilers, Deployment, and Tooling for Edge AI
8:30-9:00
Welcome and Registration
9:00-10:30
Plenary Session II: European Edge AI Ecosystem
9:00-9:30
Keynote presentation II_1
9:30-10:00
Keynote presentation II_2
10:00-10:30
Projects Pitch Presentations
10:30-11:00
Morning Coffee/Tea Break
11:00-17:00
Parallel Sessions
11:00-12:30
Session A02: Strategy for the Development of Edge AI Ecosystem.
Session Co-chairs:
Inessa Seifert, EPoSS, Germany, Paolo Azzoni, Inside Industry Association, the Netherlands
The goal of the session is to identify a potential roadmap for the European research and innovation in the domain of edge AI. The roadmap will coin future focus topics of the Chips Joint Undertaking and inspire other European programmes. We strive for an open ecosystem that fosters a fast adoption of research and innovation results in the European and global markets. We aim at strengthening the role of European chip vendors and system integrators in the emerging Digital Continuum and ensure high value proposition of key applications based on edge AI.
Keywords: edge AI ecosystem, European Chips Act, digital continuum, research and innovation.
Session B02: Smart Connectivity at the Edge.
Session Co-chairs:
Luca, Scuola Superiore Sant’Anna, Italy, Marcello Coppola, STMicroelectronics, France.
Edge systems will increasingly leverage collaboration to reach computational effectiveness while reducing hardware computational requirements (e.g., swarm learning). In addition, in network computation is emerging to reduce capacity requirements and closed-loop control execution time. This scenario demands for smart connectivity, both wired and wireless, at the edge where resources are allocated for data and control communications preserving energy, capacity, security and confidentiality. This session will focus on tools and techniques for providing the requested connectivity to the edge devices while guaranteeing the KPIs.
Keywords: wireless, wired, connectivity, collaborative computing, energy, capacity, security, confidentiality.
11:00-11:20
Presentation: A02_1: PREVAIL project: Test and Experimentation Facility for the Realization and Validation of Prototype Chips Dedicated to Edge AI.
Sergio Nicoletti, CEA-Leti, France.
The PREVAIL project will establish and start operating the core of a networked, multi-hub platform providing prototype chip fabrication capability, in advanced to EU stakeholders for Artificial Intelligence (AI) applications. In this project, four major European RTOs jointly work to create a multihub Test and Experimentation Facility for edge AI Hardware (TEF HW AI) build on their advanced 300 mm fabrication, design, and test facilities. Within PREVAIL, companies and research institutions will be able to develop, test and experiment with AI product prototypes based on innovative technologies developed by the four RTOs. The technologies made available are the most promising to address the specifications (power consumption, computing performance, data handling and security) required by AI chips in general and edge AI in particular.
Speaker: Sergio Nicoletti, CEA-Leti, France.
Sergio Nicoletti Ph.D joined the CEA in 2006 to develop optical gas sensors. Nicoletti has since served as chief researcher and project leader in several industrial and collaborative projects. Currently, he coordinates the TEF-Prevail Project. He earned a doctorate in physics from Université Joseph Fourier in Grenoble, France.
Presentation: B02_1: Edge AI LoRa Mesh Technologies.
Janis Judvaitis, Institute of Electronics and Computer Science, Latvia.
Intelligent connectivity at the edge combines wireless communication, edge artificial intelligence (AI), edge computing and Internet of Things (IoT) technologies to perform machine learning (ML) and deep learning (DL) tasks on connected edge devices. Low latency, ultra-low energy intelligent IoT devices with on-board computing, distributed architecture and analytics are essential as intelligent connectivity advances.
Speaker: Janis Judvaitis, Institute of Electronics and Computer Science, Latvia.
Janis Judvaitis is a researcher in Institute of Electronics and Computer Science (EDI) as well as a Ph.D student in Computer Science at University of Latvia. Works in EDI from 2013. He is involved in various international projects related to Wireless Sensor Networks, embedded systems, and Internet of Things. Expertise in ICT system design, development, implementation, and testing.
11:20-11:40
A02_2: European Ecosystem and Synergies for Fast Adoption of Edge AI Aolutions.
Presentation and discussion on the fast adoption of edge AI solutions, the development of a robust ecosystem and the creation of synergies among various stakeholders. Focus on the key elements and strategies for fostering this ecosystem and accelerating the adoption of edge AI.
Presentation: B02_2: Cascaded Look Up Table Distillation of P4 Deep Neural Network Switches.
Luca Valcarenghi, Scuola Superiore Sant’Anna, Pisa, Italy.
In-network function offloading represents a key enabler of the SDN-based data plane programmability to enhance network operation and awareness while speeding up applications and reducing the energy footprint. This paper proposes an innovative knowledge distillation technique that maps a DNN into a cascade of lookup tables (i.e., flow tables) with limited entry size. The proposed mapping avoids stateful elements and maths operators, whose requirement prevented the deployment of DNNs within hardware switches up to now. The evaluation considers a cyber security use case targeting a DDoS mitigator network function, showing negligible impact due to the lossless mapping reduction and feature quantization.
Speaker: Luca Valcarenghi, Scuola Superiore Sant’Anna, Pisa, Italy.
Luca Valcarenghi is an Associate Professor at the Scuola Superiore Sant’Anna of Pisa, Italy, since 2014. He received the Laurea in Electrical Engineering in 1997 from Politecnico di Torino and the M.S.E.E. and Ph.D. in Electrical Engineering Major Telecommunications from UTD in 1999 and 2001, respectively. He published more than three hundred papers in International Journals and Conference Proceedings. Dr. Valcarenghi received a Fulbright Research Scholar Fellowship in 2009 and a JSPS “Invitation Fellowship Program for Research in Japan (Long Term)” in 2013. His main research interests are optical networks design, analysis, and optimization; communication networks reliability; energy efficiency in communications networks; optical access networks; zero touch network and service management; 5G technologies and beyond.
11:40-12:00
A02_3: Collaboration Along the AI Value Chain
Collaboration along the AI value chain is crucial for the development, deployment, and success of AI solutions. The discussion will focus on which are the AI value chain various stages, from data collection and preprocessing to model development, deployment, ongoing optimization and what are the catalysts for increasing the collaboration.
Presentation: B02_3: Energy Optimisation for Edge Devices.
Javad Chamanara, University of Hannover, Germany.
The presentation gives an overview of RLKube, an RL-based custom Kubernetes scheduler plugin for optimized task scheduling. RLKube’s objective is to improving energy efficiency in a Kubernetes cluster. RLKube considers multiple optimization objectives, including energy optimization and Pod throughput. It utilizes DDQN with PER with different reward functions to train the RL agent. Our evaluations indicate the effectiveness of RLKube in outperforming the default Kubernetes scheduling policies in terms of throughput and energy usage.
Speaker: Javad Chamanara, University of Hannover, Germany.
Dr. Eng. Javad Chamanara has a PhD computer science. He is a research team lead at the University of Hannover Germany. His research projects are focused on federated learning, energy optimization, and privacy-aware computing. He is a participating to the CLEVER, BRAINE, and Glaciation projects to provide privacy-aware, energy optimization to federated data operations.
12:00-12:20
A02_4: Market Impact Along AI Value Chain for Co-creation of Edge Applications.
The discussions will focus on the co-creation of edge applications, where multiple stakeholders collaborate along the AI value chain to develop and deploy edge AI solutions, and how this co-creation have significant market impacts.
Presentation: B02_4: Edge-assisted Smart Agriculture for High Yield Eco-farms.
Alessandro Pacini, Scuola Superiore Sant’Anna, Italy.
This presentation describes the architecture and lists a preliminary set of requirements of an edge-assisted smart agriculture application for high yield eco-farms. In particular, requirements in terms of computational resources, energy, latency, transmission capacity are considered in the specific deployment of the CLEVER project.
Speaker: Alessandro Pacini, Scuola Superiore Sant’Anna, Italy.
Alessandro Pacini is a PhD student in Emerging Digital Technologies at the Scuola Superiore Sant’Anna. He received his bachelor’s degree in computer science from the University of Camerino in 2018. He then pursued his studies and obtained a joint master’s degree in computer science and Networking at the University of Pisa and Scuola Superiore Sant’Anna in 2021. During this time, he won a one-year research fellowship at SSSA focused on building a scalable and reliable monitoring architecture for optical networks. His main research interests are in the field of next-generation SD networks, with a particular focus on reusing existing network architectures to move towards a zero-touch paradigm.
12:30-13:30
Networking Lunch
13:30-15:30
Session C02: Edge AI Technology Development.
Session Co-chairs:
Ovidiu Vermesan, SINTEF AS, Norway, Patrick Pype, NXP Semiconductors, Belgium.
Edge AI combines IoT, edge computing and AI that implements new concepts for state-of-the-art AI applications at the edge. The edge technologies push the frontiers of AI to the network edge to fully unleash the potential of real-time data processing. The goal of the session is to present the latest trends and challenges.
Keywords: edge AI technologies, edge AI granularity, edge AI continuum, edge AI technology stack.
Session D02: Agri-Food and Beverage.
Session Co-chairs:
Markus Tauber, Research Studios Austria, Austria, Aymeric Deshayes, Laboratoire IMS, France
AI at the edge, on devices located closer to the data source, such as sensors and machinery within the agricultural and food processing sectors is advancing rapidly. It brings intelligence and automation to various processes, optimising efficiency, reducing waste, improving quality, and ensuring sustainability. The session covers several innovative edge AI applications in the domain with the goal of improving sustainability, reducing waste, enhancing quality, and ensuring agr-food and beverage safety throughout the entire supply chain.
Keywords: precision agriculture, energy efficiency, safety and traceability, resource optimisation, real-time decision support, yield prediction, disease identification, crop production optimisation.
13:30-13:50
C02_1 – Edge AI Frameworks Advancements.
Presentation and discussions on the trends on the development of edge AI frameworks and the developments to support edge deployments.
Presentation: D02_1: Using Edge AI in IoT Devices for Smart Agriculture Applications: Autonomous Weeding of Vegetables and Vine Health Monitoring.
Aymeric Deshayes, Laboratoire IMS, France.
Crop production uses increasingly fixed sensors in the plots, on-board sensors on tractors and robotic machines. These devices frequently have limited access to networks which make EDGE architectures particularly suitable. Through two real life use cases, this article shows how applications based on artificial vision can benefit from electronic circuits, making it possible to use artificial intelligence in low-cost EDGE architectures.
Speaker: Aymeric Deshayes, Laboratoire IMS, France.
Aymeric Deshaye is a research engineer who graduated in 2017 from the agronomic school of Bordeaux Sciences Agro, with a specialization in digital for agriculture. He is currently working at the IMS research Lab. (Bordeaux – France) in a group working more specifically on image processing applied to agriculture. Aymeric Deshayes is involved in various research projects including vine disease detection, robotic weeding and Edge Computing for Crop Monitoring. He is currently project manager for IMS Lab within the ANDANTE Project.
13:50-14:10
C02_2 – Immersive Technologies and Edge AI Convergence.
Presentation and discussions addressing the convergence of immersive technologies and edge AI has the potential to create transformative experiences and applications across various industries. Natural and responsive interaction within immersive environments. Gesture recognition, voice commands, and facial expression analysis can be processed locally, allowing for quicker responses and a more intuitive user experience.
Presentation: D02_2: Vineyard Yield Prediction.
Lilian Hollard, Université de Reims Champagne-Ardenne, France.
The Value Chain Agri-food and Beverage initiative strives to equip the European Agri-food and Beverage industry with pioneering technologies, protocols, and AI algorithms. This endeavour seeks to establish the industry’s global eminence through its leadership, resilience, and contributions to achieving climate neutrality. Within the framework of this project, we showcase the latest advancements in technology and applications, with a particular emphasis on AI and edge AI methodologies. These methodologies and techniques, used predominantly in the context of vineyard yield forecasting, stand out in the yield forecasting demonstrator, which is dedicated to crafting a dependable edge AI framework for precise yield forecasting, striving for an error margin of less than 15%.
Speaker: Lilian Hollard, Université de Reims Champagne-Ardenne, France.
First year Ph.D. student at LICIIS from the University of Reims Champagne Ardenne, development of Artificial Intelligence models for viticulture: Disease identification and yield estimation. Adaptation and optimization of Deep Learning models for Edge and mobile devices.
14:10-14:30
C02_3 – Edge AI in Autonomous Systems.
The discussions will address the edge AI technology developments for autonomous systems and robotics including specific issues related to object recognition, navigation, and human-robot interaction.
Presentation: D02_3: Disease Identification for Vineyards Fields.
Lucas Mohimont, Université de Reims Champagne-Ardenne, France.
Disease Identification aims to progress with an advanced edge AI framework tailored for real-time disease detection in the field. The latest techniques are implemented within an object detection architecture, effectively enhancing the deep learning model for tomato disease prediction. This enhancement enables real-time, on-site predictions, facilitating efficient large-scale processing. In the initial stages, meta-edge analysis could contribute to generating a map of affected zones, offering champagne manufacturers and winegrowers the means to optimize the application of phytosanitary products. The presentation focuses on state-of-the-art technological and application developments with a spotlight on AI and edge AI methods and techniques used in the project.
Speaker: Lucas Mohimont, Université de Reims Champagne-Ardenne, France.
Ph.D. in Artificial intelligence for industry. Application to viticulture and COVID-19 case modelling. Lucas Mohimont is working at the University of Reims Champagne Ardenne for the development of Artificial Intelligence models for viticulture: Disease identification and yield estimation.
14:30-14:50
C02_4 – Edge AI Standardisation Activities.
Erwin Schoitsch, AIT Austrian Institute of Technology, Austria.
Presentation and discussions on standardisation activities, EU AI Act and the challenges related to verification, validation and testing of edge AI systems.
Standardization is key to a fair, competitive society and economy. This includes technical standards, specifications and reports developed by international, European and/or industrial alliances in generic and domain-specific areas of interest. Of public interest and for public acceptance of new technologies are issues concerning safety, dependability, cybersecurity and ethical concerns, particularly in context of decision making algorithms and Artificial Intelligence. On European level, the carbon-footprint and “Green Deal” contributions play an important role as well. The presentation will provide an overview on the current efforts in standardization and by publishing guidelines and recommendations, and how they are addressed in the project AI4CSM (Automotive Intelligence for Connected Shared Mobility).
Erwin Schoitsch works more than 50 years in different positions for AIT Austrian Institute of Technology. Since his retirement in 2010 he works as Free Lancer under various subcontracts in many European Research projects for AIT and other organizations. Focus of his engagement was always on trustworthiness of highly reliable, safety-critical systems (Dependability, Safety, Cybersecurity), in industrial projects as well as European Research. He is active in many standardization groups of ISO, IEC and ISO/IEC JTC1, and the Austrian National Mirror Committees, covering topics like functional safety, cybersecurity, automated driving, Artificial Intelligence and ethical concerns. He is in several European Research Projects leading the standardization tasks.
Presentation: D02_4: CamFridge: Edge vs. Cloud Implementation of Object Recognition in the Fridge with Camera Use Case.
Ebrar Ömer, Arcelik, Turkey.
This study addresses a pivotal choice: adopting edge (local devices) or cloud computing for our smart camera-equipped fridge. Cloud systems utilize remote servers, while edge computing processes data instantly on devices. We aim to assess the YOLOv7 model’s efficacy in both paradigms for our smart fridge, given their distinct merits and challenges.
Speaker: Ebrar Ömer, Arcelik, Turkey.
Ebrar Ömer, is a 23-year-old computer engineering graduate from Istanbul Technical University (İTÜ). Currently, she works at Arçelik and has a deep passion for artificial intelligence and machine learning. Fluent in both Turkish and English, she aspires to build her career in these dynamic fields, contributing to the ongoing transformation of the technology landscape.
15:00-15:30
Afetrnoon Coffee/Tea Break
15:30-17:00
Session E02: Energy Optimisation for Edge Devices.
Session Co-chairs:
Pavel Smrz, COGNITECHNA s.r.o., Czech Republic, Paolo Meloni, Università degli studi di Cagliari, Italy
This session is dedicated to the research on power-aware edge computing, which aims to optimize edge devices’ energy efficiency and performance by dynamically adapting to the workload, communication needs, and environmental conditions. Presented papers will discuss the benefits of running optimised AI-based solutions regarding decreased power requirements and long-life operation for near real-time data processing.
Keywords: power awareness, energy efficiency, micro-power management, long battery life, dynamic adaptation to workload, energy-optimised AI, machine learning for energy optimisation.
Session F02: Edge AI Hardware Platforms.
Session Co-chairs:
Björn Debaillie, imec, Belgium, Olaf Peters, Technolution, the Netherlands.
Edge AI hardware platforms are specialised computing systems designed to accelerate and optimise the execution of AI workloads on edge devices. Various platforms are used for running AI models efficiently at the edge, where resource constraints, power efficiency, and real-time processing requirements. The session gives an overview of different technological developments addressing several edge AI HW platforms.
Keywords: multi-application HW platforms, FPGAs, Soc, SoM, MCUs, heterogeneous integration, SNN processor platforms, automated optical inspection edge AI inference platforms, heterogeneous edge systems, platforms for federated learning.
15:30-15:50
Presentation: E02_1: Tiny Transformers for On-line Processing of Sensor Data Streams on Low-power MCUs.
Paola Busia, Università degli Studi di Cagliari, Italy.
The presentation discusses the design, training and deployment of lightweight energy efficient algorithms derived from vision transformers exploited for the real-time analysis of sensor data streams. The capabilities of the presented approach are assessed on decoding and classification tasks involving biosignals. The algorithms are executed on several parallel MCU for IoT-node development.
Speaker: Paola Busia, Università degli Studi di Cagliari, Italy.
Paola Busia is assistant professor at Università degli studi di Cagliari. Her main research interests involve power efficient processing architectures for embedded applications and for at-the-edge AI.
Presentation: F02_1: SNNs on FPGAs for On-line Processing of Sensor Data.
Paolo Meloni, Università degli Studi di Cagliari, Italy.
The presentation discusses the design, training and deployment of lightweight energy efficient spiking neural networks exploited for the real-time analysis of sensor data streams. The capabilities of the presented approach are assessed on decoding and classification tasks involving biosignals. The algorithms are executed on a custom SNN processor deployed on low/mid-end FPGAs.
Speaker: Paolo Meloni, Università degli Studi di Cagliari, Italy.
Paolo Meloni is associate professor at Università degli studi di Cagliari. His main research interests involve power efficient processing architectures for embedded applications and for at-the-edge AI.
15:50-16:10
Presentation: E02_2: CA-CFAR is Convolution: Fast Target Detection With Machine Learning Accelerator.
Chen Liu, Technische Universität Dresden, Germany.
In radar target detection, Constant False Alarm Rate (CFAR) is a commonly employed detector known for its simplicity and effectiveness. Its sliding-window detection mechanism possesses computational similarity to convolutional operations in machine learning. With the increasing emergence of AI-enhanced radar processing algorithms, systems at the edge are often equipped with ML accelerators to expedite matrix multiplications and convolutions. This paper introduces a heuristic algorithm that equivalently maps Cell-Averaging (CA) CFAR to a convolutional operation and leverages machine learning accelerators for acceleration. Comparative experiments against the conventional CA-CFAR algorithm executed on ARM cores demonstrate that our proposed method significantly reduces the processing latency by 38 times without incurring substantial memory overhead. This advancement brings substantial promise for potentiating real-time high-resolution radar target detection.
Speaker: Chen Liu, Technische Universität Dresden, Germany.
Chen Liu received the BSc degree and MSc degree in electrical engineering in 2012 and 2016, respectively. He is currently working toward the PhD degree in Technische Universität Dresden, Germany. His research interests include intelligent radar signal processing, efficient deep learning on the edge and neuromorphic computing in automotive.
Presentation: F02_2: ANDANTE Platform 4.1a : A Multi-Application Platform Supporting Several Uses Cases in the Domains Digital Farming and Transport and Smart Mobility.
Ivan Miro-Panades, CEA, France.
An IoT challenge is to provide devices supporting various applications to reduce cost and parts management. As part of ANDANTE, a multi-application platform has been developed to address 6 use cases in two different applications domains Digital Farming and Transport and Smart Mobility. Platform 4.1a is a combination of an AI ASIC accelerator, NeuroCorgi, and a commercial FPGA including an ARM core. The implementation of this platform required to make a compromise between the FPGA and the ASIC to share the ANN layers and to optimise them according to the needs of the application to guarantee high application performance (energy efficiency, latency, accuracy, and good level of integration).
Speaker: Ivan Miro-Panades, CEA, France.
Ivan MIRO-PANADES received the M.S. degree in telecommunication engineering from the Technical University of Catalonia (UPC), Barcelona, Spain, in 2002, and the M.S. and Ph.D. degrees in computer science from Pierre and Marie Curie University (UPMC), Paris, France, in 2004 and 2008, respectively. He worked at Philips Research, Sureness, France and STMicroelectronics, Crolles, France, before joining CEA, Grenoble, France, in 2008, where he is currently an Expert Research Engineer in digital integrated circuits. His main research interests are artificial intelligence, the Internet of Things, low-power architectures, energy-efficient systems, and Fmax/Vmin tracking methodologies.
16:10-16:30
Presentation: E02_3: Radar-based Reactive Planning for Drones.
Hamed Javadi, imec, Belgium.
While cameras and lidars are more common in reactive planning in drones, radars can potentially complement, or replace, them thanks to their robustness against harsh weather and extreme light conditions. To this end, appropriate signal processing algorithms are needed to tackle the poor angular resolution of radars. These algorithms, on the other hand, should fit the limitations at edge (drone). In this presentation, we present a computationally efficient synthetic aperture radar (SAR) pipeline as a solution to radar-based reactive planning in drones.
Speaker:Hamed Javadi, imec, Belgium.
S. Hamed Javadi is working as a researcher at imec, Belgium, in the fields of signal processing, sensor fusion, and AI. His current work focuses on the development of AI algorithms for radar signals which also requires strong radar signal processing as a preprocessing step. Before joining imec, S. Hamed Javadi was a postdoc at Ghent University, Ghent, Belgium, where he developed efficient AI-based algorithms for smart farming based on multiple sensors’ data. S. Hamed Javadi was also an assistant professor at the University of Bojnord, Iran, where his main focuses of interest were statistical signal processing, distributed algorithms, and machine learning.
Presentation: F02_3: Automated Optical Inspection Edge AI Inference System Solutions.
Claudio Cantone, High Technology Systems H.T.S. srl, Italy and Alberto Faro, Deepsensing, DEEPS, Italy.
The presentation gives an overview of the automated optical inspection edge AI inference system solutions in digital industry by discussing if and how they allow the manufacturers to achieve a satisfactory trade-off between customer requirements and production costs. The comparison of the available solutions using KPIs, FRs and NFRs points out that AOI consisting of testing boards at the edge based on a model pre-trained on the cloud server is a promising solution if it is provided with a suitable worker interface and planning tools for managers.
Speaker: Claudio Cantone, High Technology Systems H.T.S. srl, Italy and Alberto Faro, Deepsensing, DEEPS, Italy.
Claudio Cantone received the Electronic Engineering degree from University of Pisa and the Master in Business Administration from Bocconi University. Initially he worked for several years at Philips Spa, Cinisello Balsamo, Milan in the sector of Electromedical Technical Services. Then he founded HTS srl that is a company providing Electronic Manufacturing Services (EMS) to support the entire life cycle of products in digital industry. Currently he is the Head of the HTS R&D Department.
Alberto Faro received an engineering degree from Milan Polytechnic. He was one the scientists who designed and tested the first European Informatics Network (EIN), forerunner of the Internet. From 1980 to 2016 he was Professor of Artificial Intelligence at the University of Catania where he contributed to find the Electronic and Computer Engineering Degrees. In 2019 he founded Deepsensing srl that is an innovative Startup active in the Artificial Intelligence of Things (AIoT) field.
16:30-16:50
Presentation: E02_4: Inside the AI Accelerators: From High Performance to Energy Efficiency.
Ana Pinzari, Univ. Grenoble Alpes, France.
This presentation covers current technologies for high-performance, low-power neural networks. To cope with the high computational and storage resources, hardware optimisation techniques are proposed: DL compilers and frameworks, DL hardware and hardware-specific code generator (FPGA). More specifically, in this presentation we explore the quantization mechanism in deep learning, based on a deep-CNN classification model. We highlight the accuracy of quantized models and explore their efficiency on a variety of hardware platforms. Through experiments, we show the performance achieved using general-purpose hardware (CPU and GPU) and a custom ASIC (TPU), as well as the simulated performance for a reduced bit-width representation of 4 bits, 2 bits (ternary) up to 1-bit heterogeneous quantization (FPGA).
Speaker: Ana Pinzari, Univ. Grenoble Alpes, France.
Ana Pinzari received her Ph.D degree in computer science at Université de Technologie de Compiègne, Compiègne, France in 2012, in Real-Time Embedded Systems. Then, she worked in a scientific research organization ECSI (European Electronic Chips & Systems Initiative) focusing on new design methods, tools, and standards for design of complex electronic systems. In 2021, she joined Grenoble INP, TIMA, as a post-doctoral research engineer. Her current research focuses on exploring optimisation methods for the hardware implementation of neural networks.
Presentation: F02_4: Federated Learning in Cybersecurity.
Dimitrios Serpanos, CTI and University of Patras, Greece.
Federated learning constitutes a promising solution for ML/AI-enabled cybersecurity solutions in distributed environments with Edge systems. We present an efficient malware detection solution employing federated learning for environments that combine powerful as well as limited resource edge systems. We demonstrate that federated learning enables effective cybersecurity solutions for distributed environments that include heterogeneous edge systems and have constraints and limitations in data exchange, ranging from performance to IP.
Speaker: Dimitrios Serpanos, CTI and University of Patras, Greece.
Dimitrios Serpanos is president of the Computer Technology Institute & Press DIOPHANTUS and Professor of ECE at the University of Patras, Greece. He is Chair of the Scientific Council of INSIDE Industrial Association.
17:00
End
Parallel Session A01: Title - Room A01
Architecting Edge AI Workflows for Predictive Maintenance in Industrial Applications
This presentation highlights on the importance of properly architecting the AI workflows for the design, development, and deployment of predictive maintenance applications in industrial applications at the edge. It is advocated that the selection of the frameworks/platforms employed for the task largely depend on the application, IIoT devices and their physical operating environments, rather than on the available knowledge and experience of the people, as suggested in similar literature. For this purpose, it was employed several existing AI frameworks and inference engines, that permit end-to-end solutions with various degree of automation and integration with Arm® Cortex®-M-based MCUs. The presentation addresses the verification and validation aspects of model design, development, and deployment of AI-based industrial applications and provides quantitative and qualitative insights that can ultimately allow the use of the right framework. The use case presented is a classification for predictive maintenance based on the vibration of generic rotating equipment (such as motors with vibration pumps, fans, compressors), common to many industrial applications, such as manufacturing.
Speaker
Ovidiu Vermesan (SINTEF, Norway)
Ovidiu Vermesan is Chief Scientist at SINTEF Digital, Oslo, where he is involved in applied research on future edge autonomous intelligent systems and edge AI, wireless sensing devices and networks, smart systems integration, microelectronics design of integrated systems (analogue and mixed signal), IIoT. He holds a PhD in Microelectronics and a Master of International Business (MIB). His applied research activities focus on advancing edge AI processing, embedded electronics, wireless and smart sensing technologies, and the convergence of these technologies in different industrial sectors.